EM357-RTR datasheet(40/240 Pages) ETC2

40 / 240 page

EM351 / EM357

Note:

While CPU Lockup is shown as a reset condition in software, CPU Lockup is not specifically a reset

event. CPU Lockup is set to indicate that the CPU entered an unrecoverable exception. Execution stops but a

reset is not applied. This is so that a debugger can interpret the cause of the error. Ember recommends that

in a live application (in other words, no debugger attached) the watchdog be enabled by default so that the

EM35x can be restarted.

6.2.3

Reset Generation

The Reset Generation module responds to reset sources and generates the following reset signals:

PORESET

Reset of the ARM

® CortexTM-M3 CPU and ARM® CortexTM-M3 System Debug components

(Flash Patch and Breakpoint, Data Watchpoint and Trace, Instrumentation Trace

Macrocell, Nested Vectored Interrupt Controller). ARM defines PORESET as the region

that is reset when power is applied.

SYSRESET

Reset of the ARM

® CortexTM-M3 CPU without resetting the Core Debug and System Debug

components, so that a live system can be reset without disturbing the debug

configuration.

DAPRESET

Reset to the SWJ’s AHB Access Port (AHB-AP)

PRESETHV

Peripheral reset for always-on power domain, for peripherals that are required to retain

their configuration across a deep sleep cycle

PRESETLV

Peripheral reset for core power domain, for peripherals that are not required to retain

their configuration across a deep sleep cycle

Table 6-5 shows which reset sources generate certain resets.

Table 6-5. Generated Resets

Reset Generation

Reset Source

PORESET

SYSRESET

DAPRESET

PRESETHV

PRESETLV

POR HV

POR LV (in deep sleep)

POR LV (not in deep sleep)

RSTB

Watchdog reset

Software reset

Option byte error

Normal deep sleep

Emulated deep sleep

Debug reset

6.3

Clocks

The EM35x integrates four oscillators:

12 MHz RC oscillator

24 MHz crystal oscillator

10 kHz RC oscillator

32.768 kHz crystal oscillator

6-5

120-035X-000D

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