HD64F2149YV datasheet(610/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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Section 18A Host Interface X-Bus Interface (XBS)

Rev. 3.00 Jan 18, 2006 page 582 of 1044

REJ09B0280-0300

18A.1.2 Block Diagram

Figure 18A.1 shows a block diagram of the HIF:XBS.

Internal interrupt signals

IBF2 IBF1

Control logic

HDB7 to HDB0

IDR3

ODR3

STR3

IDR4

ODR4

STR4

HICR2

Host

interrupt

request

Fast

A20 gate

control

Ports 4, 8, B

Internal data bus

Bus

interface

CS1

CS2/ECS2

CS3

CS4

IOR

IOW

HA0

HIRQ1

HIRQ11

HIRQ12

HIRQ3

HIRQ4

GA20

HIFSD

IDR1

ODR1

STR1

IDR2

ODR2

STR2

HICR

IBF4 IBF3

Legend:

IDR1:

IDR2:

ODR1:

ODR2:

STR1:

STR2:

HICR:

Input data register 1

Input data register 2

Output data register 1

Output data register 2

Status register 1

Status register 2

Host interface control register 1

IDR3:

IDR4:

ODR3:

ODR4:

STR3:

STR4:

HICR2:

Input data register 3

Input data register 4

Output data register 3

Output data register 4

Status register 3

Status register 4

Host interface control register 2

Figure 18A.1 Block Diagram of HIF:XBS

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