GD32H757VMT7 datasheet(129/151 Pages) GIGADEVICE

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GD32H757xx Datasheet

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4.28.

I2S characteristics

Table 4-62. I2S characteristics(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fCK

Clock frequency

Master mode (data: 32 bits,

Audio frequency = 96 kHz)

—

6.25

—

MHz

Slave mode

—

12.5

Clock high time

—

Clock low time

—

tV(WS)

WS valid time

Master mode

—

tH(WS)

WS hold time

Master mode

—

tSU(WS)

WS setup time

Slave mode

—

tH(WS)

WS hold time

Slave mode

—

Ducy(SCK)

I2S slave input clock duty

cycle

Slave mode

—

tSU(SD_MR)

Data input setup time

Master mode

—

tsu(SD_SR)

Data input setup time

Slave mode

—

tH(SD_MR)

Data input hold time

Master receiver

—

tH(SD_SR)

Slave receiver

—

tv(SD_ST)

Data output valid time

Slave transmitter

(after enable edge)

—

th(SD_ST)

Data output hold time

Slave transmitter

(after enable edge)

—

tv(SD_MT)

Data output valid time

Master transmitter

(after enable edge)

—

th(SD_MT)

Data output hold time

Master transmitter

(after enable edge)

—

(1)

Value guaranteed by design, not 100% tested in production.

(2)

Value guaranteed by characterization, not 100% tested in production.

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