GD32H757VMT7 datasheet(46/151 Pages) GIGADEVICE

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GD32H757xx Datasheet

LQFP100

Pin Name

Pins

Type(1)

I/O

Level(2)

Functions description

SDIO0_CMDDIR, UART3_TX, CAN0_TX, SDIO1_D5,

I2C3_SMBA, SDIO0_D5, DCI_D7, TLI_B7, EVENTOUT

PE0

I/O

Default: PE0

Alternate: TIMER3_ETI, UART7_RX, SAI1_MCLK0,

EXMC_NBL0, DCI_D2, TLI_R0, EVENTOUT

PE1

I/O

Default: PE1

Alternate: UART7_TX, EXMC_NBL1, DCI_D3, TLI_R6,

EVENTOUT

VSS

Default: VSS

VDD

100

Default: VDD

(1)

Type: I = input, O = output, P = power.

(2)

I/O Level: 5VT = 5 V tolerant.

(3)

USBHS0_DM and USBHS0_DP pins can only be used for USBHS.

(4)

PC2_C and PC3_C can only be used as analog pins.

2.6.3.

GD32H757Vx BGA100 pin definitions

Table 2-5. GD32H757Vx BGA100 pin definitions

BGA100

Pin Name

Pins

Type(1)

I/O

Level(2)

Functions description

PE2

I/O

Default: PE2

Alternate: TRACECK, SAI0_CLK0, SPI3_SCK,

SAI0_MCLK0, OSPIM_P0_IO2, EXMC_A23, EVENTOUT

PE3

I/O

Default: PE3

Alternate:

TRACED0, TIMER14_BRKIN0, SAI0_SD1,

EXMC_A19, DCI_PIXCLK, EVENTOUT

PE4

I/O

Default: PE4

Alternate: TRACED1 , TIMER0_BRKIN1, SAI0_DAT1,

HPDF_DATAIN3, TIMER14_MCH0, SPI3_NSS, SAI0_FS0,

EXMC_A20, DCI_D4, TLI_B0, EVENTOUT

PE5

I/O

Default: PE5

Alternate: TRACED2 , SAI0_CLK1, HPDF_CKIN3,

TIMER14_CH0 , SPI3_MISO, SAI0_SCK0, EXMC_A21,

DCI_D6, TLI_G0, EVENTOUT

PE6

I/O

Default: PE6

Alternate: TRACED3 , TIMER0_BRKIN2, SAI0_DAT0,

TIMER14_CH1 , SPI3_MOSI, SAI0_SD0 , SAI1_MCLK1,

CMP_MUX_OUT3, EXMC_A22, DCI_D7, TLI_G1,

EVENTOUT

VSS

Default: VSS

VDD

Default: VDD

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