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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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TUSB8042AI Folha de dados(PDF) 42 Page - Texas Instruments |
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TUSB8042AI Folha de dados(HTML) 42 Page - Texas Instruments |
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42 / 64 page  9.2.1.2.2 Downstream Port 1 Implementation The downstream port 1 of the TUSB8042A is connected to a USB3 Type-A connector. With BATEN1 pin pulled up, Battery Charge support is enabled for Port 1. If Battery Charge support is not needed, then TI recommends to uninstall the pullup resistor on BATEN1. POPULATE FOR BC SUPPORT DN1_VBUS VBUS_DS1 USB_SSTXP_DN1 USB_SSRXM_DN1 CAP_DN_TXM1 USB_SSRXP_DN1 CAP_DN_TXP1 USB_DM_DN1 USB_DP_DN1 USB_SSTXM_DN1 BOARD_3P3V DN1_VBUS PWRCTRL1_BATEN1 OVERCUR1Z C6 0.1uF C9 0.001uF C7 0.1uF 0201 C8 0.1uF 0201 J2 USB3_TYPEA_CONNECTOR VBUS 1 DM 2 DP 3 GND 4 SSRXN 5 SSRXP 6 GND 7 SSTXN 8 SSTXP 9 SHIELD0 10 SHIELD1 11 TUSB8042A U1B PWRCTL1/BATEN1 36 OVERCUR1 46 USB_DP_DN1 1 USB_DM_DN1 2 USB_SSTXP_DN1 3 USB_SSTXM_DN1 4 USB_SSRXP_DN1 6 USB_SSRXM_DN1 7 C10 0.1uF R6 4.7K 0402 5% FB1 220 at 100MHZ R7 1M 0402 5% Figure 9-3. Downstream Port 1 Implementation 9.2.1.2.3 Downstream Port 2 Implementation The downstream port 2 of the TUSB8042A is connected to a USB3 Type-A connector. With BATEN2 pin pulled up, Battery Charge support is enabled for Port 2. If Battery Charge support is not needed, then TI recommends to uninstall the pullup resistor on BATEN2. For ferrite bead used on the VBUS connection, a lower resistance is recommended due to noticeable IR drop during high current charging modes. The isolation between the Type-A connectors shield ground and signal ground pins is not required. Some applications may have better ESD/EMI performance when the grounds are shorted together. POPULATE FOR BC SUPPORT USB_SSRXP_DN2 USB_SSRXM_DN2 CAP_DN2_TXP CAP_DN2_TXM VBUS_DS2 USB_DP_DN2 USB_DM_DN2 USB_SSTXM_DN2 USB_SSTXP_DN2 DN2_VBUS BOARD_3P3V DN2_VBUS OVERCUR2Z PWRCTRL2_BATEN2 J3 USB3_TYPEA_CONNECTOR VBUS 1 DM 2 DP 3 GND 4 SSRXN 5 SSRXP 6 GND 7 SSTXN 8 SSTXP 9 SHIELD0 10 SHIELD1 11 C11 0.1uF C14 0.1uF C15 0.001uF FB2 220 at 100MHZ R9 1M 0402 5% C13 0.1uF 0201 C12 0.1uF 0201 R8 4.7K 0402 5% TUSB8042A U1C PWRCTL2/BATEN2 35 OVERCUR2 47 USB_DP_DN2 9 USB_DM_DN2 10 USB_SSTXP_DN2 11 USB_SSTXM_DN2 12 USB_SSRXP_DN2 14 USB_SSRXM_DN2 15 Figure 9-4. Downstream Port 2 Implementation TUSB8042A SLLSF93A – JUNE 2019 – REVISED JANUARY 2025 www.ti.com 42 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TUSB8042A |
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