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6.22.2 GPIO Peripheral Input/Output Electrical Data/Timing

GPIx

GPOx

TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372 – MAY 2007

Table 6-82. Timing Requirements for GPIO Inputs

(1) (see Figure 6-46)

-720

-900

NO.

UNIT

MIN

MAX

tw(GPIH)

Pulse duration, GPIx high

12P

tw(GPIL)

Pulse duration, GPIx low

12P

(1)

The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the DM647/DM648

recognize the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to allow the device

enough time to access the GPIO register through the internal bus. P = 1/CPU clock frequency in ns.

Table 6-83. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs

(see Figure 6-46)

-720

-900

NO.

PARAMETER

UNIT

MIN

MAX

tw(GPOH)

Pulse duration, GPOx high

6P(1)

tw(GPOL)

Pulse duration, GPOx low

6P(1)

Figure 6-46. GPIO Port Timing

(1)

This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the

GPIO is dependent upon internal bus activity.P = 1/CPU clock frequency in ns.

162

Peripheral Information and Electrical Specifications

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