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TMS320DM647 Folha de dados(PDF) 86 Page - Texas Instruments |
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TMS320DM647 Folha de dados(HTML) 86 Page - Texas Instruments |
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86 / 166 page ![]() www.ti.com 6.7.7 Reset Controller Register 6.7.8 Reset Electrical Data/Timing TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 The reset type status (RSTYPE) register is the only register for the reset controller. 6.7.7.1 Reset Type Status Register Description The reset type status (RSTYPE) register latches the cause of the last reset. If multiple reset sources occur simultaneously, this register latches the highest priority reset source. The reset type status register is shown in Figure 6-9 and described in Table 6-22. 31 16 Reserved R-0 15 4 3 2 1 0 Reserved SRST MRST WRST POR R-0 R-0 R-0 R-0 R-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Figure 6-9. Reset Type Status Register (RSTYPE) Table 6-22. Reset Type Status Register (RSTYPE) Field Descriptions Bit Field Value Description 31:4 Reserved Reserved. The reserved bit location is always read as 0. A value written to this field has no effect. 3 SRST System reset 0 System Reset was not the last reset to occur. 1 System Reset was the last reset to occur. 2 MRST Max reset 0 Max Reset was not the last reset to occur. 1 Max Reset was the last reset to occur. 1 WRST Warm reset 0 Warm Reset was not the last reset to occur. 1 Warm Reset was the last reset to occur. 0 POR Power-on reset 0 Power-on Reset was not the last reset to occur. 1 Power-on Reset was the last reset to occur. NOTE If a configuration pin must be routed out from the device, the internal pullup/pulldown (IPU/IPD) resistor should not be relied upon; TI recommends the use of an external pullup/pulldown resistor. Table 6-23. Timing Requirements for Reset (1) (2) (see Figure 6-10 and Figure 6-11) -720 -900 NO. UNIT MIN MAX 5 tw(POR) Pulse duration, POR low (3)ns 6 tw(RESET) Pulse duration, RESET low ns (1) C = 1/CLKIN1 clock frequency in ns. (2) D = 1/CLKIN2 clock frequency in ns. (3) If CLKIN2 is not used, tw(POR) must be measured in terms of CLKIN1 cycles; otherwise, use CLKIN2 cycles. Peripheral Information and Electrical Specifications 86 Submit Documentation Feedback |
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