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TMS320DM647 Folha de dados(PDF) 42 Page - Texas Instruments |
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TMS320DM647 Folha de dados(HTML) 42 Page - Texas Instruments |
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42 / 166 page  www.ti.com 3.2.6 PINMUX Register TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 Writes to these registers are locked/blocked by default. To enable writes to these registers, write 0xADDDECAF to the KEY_REG. After enabling writes to protected registers by doing the above, the register writes should occur within 10000 CPU/6 cycles, after which the key will be reset. Figure 3-5. KEY_REG 31 0 KEY_REG W-0x00000000 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset All pin multiplexing options are controlled by software via PINMUX register (except the ones mentioned in Table 3-7, whose default is selected by configuration pins). This PINMUX register reside within the system module portion of the CFG bus memory map. The format of the registers and a description of the pins they control are in the following sections. The PINMux Register controls all the software-controlled pin muxing. The register format is shown in Figure 3-6. A brief description of each field is shown in Table 3-6. Figure 3-6. PINMUX Register 31 22 21 20 19 18 17 16 Reserved GPIO_EN Reserved VPI_EN R-0000 0000 00 R/W-00 R-00 R/W-00 15 14 13 12 11 10 9 8 7 6 5 4 3 1 0 VP34_EN SPI_UART_EN Reserved MCASP_EN Reserved VLYNQ_EN Reserved TIMER _EN R/W-00 R/W-00 R-00 R/W-00 R-00 R/W-00 R-000 R/W-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 3-6. PINMUX Register Field Descriptions Bit Field Value Description 31:22 Reserved Reserved 21:20 GPIO_EN Controls the pin muxing between Video Port 0 and the GPIO[12:15] UNMUXED (1) UNMUXED (2) SECONDARY MUXED(3) .VP0D16-19 VP0D02-09/CLK/CTL VP0D12-15 GP12-15 00 3-state 3-state 3-state 01 3-state 3-state 3-state 10 Enable Enable VP0D12-15 11 3-state Enable GP12-15 19:18 Reserved Reserved (1) The complete list of pins: U20, U21, U22, R18. (2) The complete list of pins: Y23, V23, Y22, V22, U23, W20, V18, U18, V19, W21, T18, U19, V20. (3) The complete list of pins: V21, T19, T20, T21. Device Configuration 42 Submit Documentation Feedback |
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