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SST26VF040A-80I/MFVAO Folha de dados(PDF) 37 Page - Microchip Technology |
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SST26VF040A-80I/MFVAO Folha de dados(HTML) 37 Page - Microchip Technology |
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37 / 73 page ![]() 2020-2021 Microchip Technology Inc. DS20006292B-page 37 SST26VF040A 5.33 Lock-Down Protection Settings (LDPS) The Lock-Down Protection Settings instruction prevents changes to the Block Protection bits (BP0, BP1, BP2, BP3) of the STATUS register during device operation. Lock-Down resets after power cycling or hardware Reset; this allows the Block Protection settings to be changed. Execute WREN before initiating the Lock-Down Protection Settings instruction. To execute a Lock-Down Protection Settings command, the host drives CE# low, then sends the Lock-Down Protection Settings command cycle (8DH), then drive CE# high. Executing the LDPS instruction will set the VLP bit in the Configuration register. FIGURE 5-38: LOCK-DOWN PROTECTION SETTINGS (SQI) FIGURE 5-39: LOCK-DOWN PROTECTION SETTINGS (SPI) Note: C[1:0] = 8DH MODE 3 0 1 SCK SIO[3:0] CE# C1 C0 MODE 0 MODE 3 0 1 SCK SIO0 CE# MODE 0 234567 8D SIO[3:1] |
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