Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

5228-DS05-R Folha de dados(PDF) 80 Page - Broadcom Corporation.

Nome de Peças 5228-DS05-R
Descrição Electrónicos  10/100BASE-TX/FX Octal Transceiver
PDF  100 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  BOARDCOM [Broadcom Corporation.]
Página de início  http://www.broadcom.com
Logo BOARDCOM - Broadcom Corporation.

5228-DS05-R Folha de dados(HTML) 80 Page - Broadcom Corporation.

Back Button 5228-DS05-R Datasheet HTML 76Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 77Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 78Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 79Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 80Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 81Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 82Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 83Page - Broadcom Corporation. 5228-DS05-R Datasheet HTML 84Page - Broadcom Corporation. Next Button
Zoom Inzoom in Zoom Outzoom out
 80 / 100 page
background image
BCM5228
Data Sheet
7/12/04
Broa d c om Co rp o r a t i o n
Page 68
Auxiliary Mode 3 Register (Shadow Register)
Document
5228-DS09-405-R
AUXILIARY MODE 3 REGISTER (SHADOW REGISTER)
FIFO Size Select[3:0]. The BCM5228 indicates the current selection of receive FIFO size using bit 3 through 0, as shown
in Table 47. The size can also be determined by the Extended FIFO Enable bit (register 10h, bit 2) and the Jumbo Packet
FIFO Enable bit (register 1Bh, bit 9) for backward compatibility with the 0.35-micron products.
Table 46: Auxiliary Mode 3 Register (Shadow Register 29d, 1Dh)
BIt
Name
R/W
Description
Default
15:9
Reserveda
a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”
––
0
8
Reserveda
––
0
7
Reserveda
––
0
6
Reserveda
––
0
5:4
Reserveda
––
0h
3:0
FIFO Size Select [3:0]
R/W
Currently-selected receive FIFO size
4h
Note: R/W = Read/Write, RO = Read Only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear
after read operation. MII Shadow register bank 1 is accessed by setting MII register 1Fh bit 7 to a 1.
Table 47: Current Receive FIFO Size
FIFO Size Select[3:0]
Receive Fifo size in Use
(# of bits)
0000
12
0001
16
0010
20
0011
24
0100
28
0101
32
0110
36
0111
40
1000
44
1001
48
1010
52
1011
56
1100
60
1101
64



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com