SPC564A70B4 datasheet(32/133 Pages) STMICROELECTRONICS

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Introduction

SPC564A70B4, SPC564A70L7

32/133

Doc ID 18078 Rev 4

1.5.26

Nexus port controller (NPC)

The NPC block provides real-time Nexus Class3+ development support capabilities for the

SPC564A70 Power Architecture technology-based MCU in compliance with the IEEE-ISTO

5001-2010 standard. MDO port widths of 4 pins and 12 pins are available in all packages.

1.5.27

JTAG controller (JTAGC)

The JTAG controller (JTAGC) block provides the means to test chip functionality and

connectivity while remaining transparent to system logic when not in test mode. Testing is

performed via a boundary scan technique, as defined in the IEEE 1149.1-2001 standard. All

data input to and output from the JTAGC block is communicated in serial format. The

JTAGC block is compliant with the IEEE 1149.1-2001 standard and supports the following

features:

●

IEEE 1149.1-2001 Test Access Port (TAP) interface 4 pins (TDI, TMS, TCK, and TDO)

●

A 5-bit instruction register that supports the following IEEE 1149.1-2001 defined

instructions:

–

BYPASS, IDCODE, EXTEST, SAMPLE, SAMPLE/PRELOAD, HIGHZ, CLAMP

●

A 5-bit instruction register that supports the additional following public instructions:

–

ACCESS_AUX_TAP_NPC

–

ACCESS_AUX_TAP_ONCE

–

ACCESS_AUX_TAP_eTPU

–

ACCESS_CENSOR

●

3 test data registers to support JTAG Boundary Scan mode

–

Bypass register

–

Boundary scan register

–

Device identification register

●

A TAP controller state machine that controls the operation of the data registers,

instruction register and associated circuitry

●

Censorship Inhibit Register

–

64-bit Censorship password register

–

If the external tool writes a 64-bit password that matches the Serial Boot password

stored in the internal flash shadow row, Censorship is disabled until the next

system reset.

1.5.28

Development trigger semaphore (DTS)

SPC564A70 devices include a system development feature, the Development Trigger

Semaphore (DTS) module, that enables user software to signal to an external tool—by

driving a persistent (affected only by reset or an external tool) signal on an external device

pin—that data is available. The DTS includes a register of semaphores (32-bits) and an

identification register.

There are a variety of ways this module can be used, including as a component of an

external real-time data acquisition system.

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