SPC564A70B4 datasheet(96/133 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC564A70B4, SPC564A70L7

96/133

Doc ID 18078 Rev 4

3.14

Platform flash controller electrical characteristics

3.15

Flash memory electrical characteristics

Table 32.

APC, RWSC, WWSC settings vs. frequency of operation(1)

APC, RWSC and WWSC are fields in the flash memory BIUCR register used to specify

wait states for address pipelining and read/write accesses. Illegal combinations exist—all

entries must be taken from the same row.

Max. Flash Operating

Frequency (MHz)(2)

Max frequencies including 2% PLL FM.

APC(3)

APC must be equal to RWSC.

RWSC(3)

WWSC

20 MHz

0b000

0b01

61 MHz

0b001

0b01

90 MHz

0b010

0b01

123 MHz

0b011

0b01

153 MHz

0b100

0b01

Table 33.

Flash program and erase specifications(1)

Symbol

Parameter

Value

Unit

Min

Typ

Initial

max(2)

Max(3)

1Tdwprogram

C Double Word (64 bits) Program Time

—

500

µs

2Tpprogram

C Page Program Time(4)

—

160

500

µs

3T16kpperase

C 16 KB Block Pre-program and Erase Time

—

1000

5000

5T64kpperase

C 64 KB Block Pre-program and Erase Time

—

1800

5000

6T128kpperase

C 128 KB Block Pre-program and Erase Time

—

2600

7500

7T256kpperase

C 256 KB Block Pre-program and Erase Time

—

5200

15000

8Tpsrt

—

Program suspend request rate(5)

100

—

μs

9Tesrt

—

Erase suspend request rate (6)

Typical program and erase times assume nominal supply values and operation at 25 °C. All times are subject to change

pending device characterization.

Initial factory condition: < 100 program/erase cycles, 25 °C, typical supply voltage, 80 MHz minimum system frequency.

The maximum erase time occurs after the specified number of program/erase cycles. This maximum value is characterized

but not guaranteed.

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