SPC564A70B4 datasheet(19/133 Pages) STMICROELECTRONICS

19 / 133 page

SPC564A70B4, SPC564A70L7

Introduction

Doc ID 18078 Rev 4

19/133

●

Programmable frequency modulation

–

Modulation enabled/disabled through software

–

Triangle wave modulation up to 100 kHz modulation frequency

–

Programmable modulation depth (0% to 2% modulation depth)

–

Programmable modulation frequency dependent on reference frequency

●

Lock detect circuitry reports when the PLL has achieved frequency lock and

continuously monitors lock status to report loss of lock conditions

●

Clock Quality Module

–

Detects the quality of the crystal clock and causes interrupt request or system

reset if error is detected

–

Detects the quality of the PLL output clock; if error detected, causes system reset

or switches system clock to crystal clock and causes interrupt request

●

Programmable interrupt request or system reset on loss of lock

●

Self-clocked mode (SCM) operation

1.5.7

System integration unit (SIU)

The SPC564A70 SIU controls MCU reset configuration, pad configuration, external

interrupt, general purpose I/O (GPIO), internal peripheral multiplexing, and the system reset

operation. The reset configuration block contains the external pin boot configuration logic.

The pad configuration block controls the static electrical characteristics of I/O pins. The

GPIO block provides uniform and discrete input/output control of the I/O pins of the MCU.

The reset controller performs reset monitoring of internal and external reset sources, and

drives the RSTOUT pin. Communication between the SIU and the e200z4 CPU core is via

the crossbar switch. The SIU provides the following features:

●

System configuration

–

MCU reset configuration via external pins

–

Pad configuration control for each pad

–

Pad configuration control for virtual I/O via DSPI serialization

●

System reset monitoring and generation

–

Power-on reset support

–

Reset status register provides last reset source to software

–

Glitch detection on reset input

–

Software controlled reset assertion

●

External interrupt

–

Rising or falling edge event detection

–

Programmable digital filter for glitch rejection

–

Critical Interrupt request

–

Non-Maskable Interrupt request

●

GPIO

–

Centralized control of I/O and bus pins

–

Virtual GPIO via DSPI serialization (requires external deserialization device)

–

Dedicated input and output registers for setting each GPIO and Virtual GPIO pin

SPC564A70B4 Folha de dados(PDF) 19 Page - STMicroelectronics

SPC564A70B4 Folha de dados(HTML) 19 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL