CC1150-RTR1 datasheet(17/67 Pages) TI

17 / 67 page

CC1150

SWRS037A

Page 17 of 60

Transmit mode

IDLE

Manual freq.

synth. calibration

TX FIFO

underflow

Frequency

synthesizer on

SFSTXON

STX

SFTX

SIDLE

SCAL

IDLE

TXOFF_MODE=00

SRX or STX or SFSTXON

Sleep

SPWD

Crystal

oscillator off

SXOFF

CSn=0

TXOFF_MODE=01

Frequency

synthesizer startup,

optional calibration,

settling

Optional freq.

synth. calibration

Default state when the radio is not

receiving or transmitting. Typ.

current consumption: 1.1 mA.

Lowest power mode.

Current consumption typ

200nA.

All register values are

retained. Typ. current

consumption; 0.22 mA.

Used for calibrating frequency

synthesizer upfront (entering

transmit mode can then be

done quicker). Transitional

state. Typ. current

consumption: 7.7 mA.

Frequency synthesizer is turned on, can optionally be

calibrated, and then settles to the correct frequency.

Transitional state. Typ. current consumption: 7.7 mA.

Frequency synthesizer is on,

ready to start transmitting.

Transmission starts very

quickly after receiving the STX

command strobe.Typ. current

consumption: 7.7 mA.

Typ. current consumption 868 MHz:

14 mA at -10 dBm output,

15 mA at 0 dBm output,

24 mA at +7 dBm output,

29 mA at +10 dBm output.

Optional transitional state. Typ.

current consumption: 7.7 mA.

In FIFO-based modes,

transmission is turned off and

this state entered if the TX

FIFO becomes empty in the

middle of a packet. Typ.

current consumption: 1.1 mA.

Figure 7: Simplified State Diagram with Typical Usage and Current Consumption

Configuration Software

CC1150 can be configured using the SmartRF®

Studio [11] software, available for download

from www.ti.com/smartrfstudio. The SmartRF

Studio software is highly recommended for

obtaining optimum register settings, and for

evaluating performance and functionality. A

screenshot of the SmartRF Studio user

interface for

CC1150 is shown in Figure 8.

After chip reset, all the registers have default

values as shown in the tables in section 25.

The optimum register setting might differ from

the default value. After a reset all registers that

shall be different from the default value

therefore needs to be programmed through

the SPI interface.

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