CC1150-RTR1 datasheet(50/67 Pages) TI

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CC1150

SWRS037A

Page 50 of 60

0x13: MDMCFG1 – Modulator configuration

Bit

Field Name

Reset

R/W

Description

FEC_EN

R/W

Enable Forward Error Correction (FEC) with interleaving for

packet payload

0 = Disable

1 = Enable (Only supported for fixed packet length mode, i.e.

PKTCTRL0.LENGTH_CONFIG=0

)

6:4

NUM_PREAMBLE[2:0]

R/W

Sets the minimum number of preamble bytes to be transmitted

Setting

Number of preamble bytes

0 (000)

1 (001)

2 (010)

3 (011)

4 (100)

5 (101)

6 (110)

7 (111)

3:2

Not Used.

1:0

CHANSPC_E[1:0]

R/W

2 bit exponent of channel spacing.

0x14: MDMCFG0 – Modulator configuration

Bit

Field Name

Reset

R/W

Description

7:0

CHANSPC_M[7:0]

248 (0xF8)

R/W

8-bit mantissa of channel spacing (initial 1 assumed). The

channel spacing is multiplied by the channel number CHAN and

added to the base frequency. It is unsigned and has the format:

()

CHAN

CHANSPC

XOSC

CHANNEL

⋅

∆

256

The default values give 199.951 kHz channel spacing (the

closest setting to 200 kHz), assuming 26.0 MHz crystal

frequency.

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