CC1150-RTR1 datasheet(39/67 Pages) TI

39 / 67 page

CC1150

SWRS037A

Page 39 of 60

23 Asynchronous and Synchronous Serial Operation

Several features and modes of operation have

been included in the

CC1150 to provide

backward compatibility with previous Chipcon

products and other existing RF communication

systems. For new systems, it is recommended

to use the built-in packet handling features, as

they can give more robust communication,

significantly offload the microcontroller and

simplify software development.

23.1

Asynchronous Serial Operation

For backward compatibility with systems

already using the asynchronous data transfer

from other Chipcon products, asynchronous

transfer is also included in

CC1150.

When asynchronous transfer is enabled,

several of the support mechanisms for the

MCU that are included in

CC1150 will be

disabled, such as packet handling hardware,

buffering in the FIFO and so on. The

asynchronous transfer mode does not allow

the use of the data whitener, interleaver and

FEC, and it is not possible to use Manchester

encoding.

MSK

not

supported

for

asynchronous transfer.

Setting

PKTCTRL0.PKT_FORMAT

enables asynchronous transparent (serial)

mode. In TX, the GDO0 pin is used for data

input (TX data).

The MCU must control start and stop of

transmit with the STX and SIDLE strobes.

The

CC1150 modulator samples the level of the

asynchronous input 8 times faster than the

programmed data rate. The timing requirement

for the asynchronous stream is that the error in

the bit period must be less than one eighth of

the programmed data rate.

23.2

Synchronous Serial Operation

Setting

PKTCTRL0.PKT_FORMAT

enables synchronous serial operation mode. In

this operational mode the data must be NRZ

encoded (MDMCFG2.MANCHESTER_EN=0). In

synchronous serial operation mode, data is

transferred on a two wire serial interface. The

CC1150 provides a clock that is used to set up

new data on the data input line. Data input (TX

data) is the GDO0 pin. This pin will

automatically be configured as an input when

TX is active. The TX latency is 8 bits.

Preamble and sync word insertion may or may

not be active, dependent on the sync mode set

by the MDMCFG3.SYNC_MODE.

If preamble and sync word is disabled, all

other packet handler features and FEC should

also be disabled. The MCU must then handle

preamble and sync word insertion in software.

If preamble and sync word insertion is left on,

all packet handling features and FEC can be

used. When using the packet handling

features synchronous serial mode, the

CC1150

will insert the preamble and sync word and the

MCU will only provide the data payload. This is

equivalent

the

recommended

FIFO

operation mode.

24 System considerations and Guidelines

24.1

SRD Regulations

International regulations and national laws

regulate the use of radio receivers and

transmitters. Short Range Devices (SRDs) for

license free operation below 1 GHz are usually

operated in the 315 MHz, 433 MHz, 868 MHz

or 915 MHz frequency bands. The

CC1150 is

specifically designed for such use with its 300-

348 MHz, 400-464 MHz and 800-928 MHz

operating

ranges.

The

most

important

regulations when using the

CC1150 in the 315

MHz, 433 MHz, 868 MHz or 915 MHz

frequency bands are EN 300 220 (Europe)

and FCC CFR47 part 15 (USA). A summary of

the

most

important

aspects

these

regulations can be found in AN001 [10].

Please note that compliance with regulations is

dependent on complete system performance.

the

end

product

manufactor’s

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