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MCP19111

DS22331A-page 10

 2013 Microchip Technology Inc.

2.0

PIN DESCRIPTION

The 28-Lead MCP19111 device features pins that have

multiple functions associated with each pin. Table 2-1

provides a description of the different functions. See

Section 2.1 “Detailed Pin Functional Description”

for more detailed information.

TABLE 2-1:

MCP19111 PINOUT DESCRIPTION

Name

Function

Input

Type

Output

Type

Description

GPA0/AN0/ANALOG_TEST

GPA0

TTL

CMOS

General purpose I/O

AN0

—

A/D Channel 0 input.

ANALOG_TEST

—

Internal analog signal multiplexer output (1)

GPA1/AN1/CLKPIN

GPA1

TTL

CMOS

General purpose I/O

AN1

—

A/D Channel 1 input.

CLKPIN

—

Switching frequency clock input or output (2 ,3)

GPA2/AN2/T0CKI/INT

GPA2

TTL

CMOS

General purpose I/O

AN2

—

A/D Channel 2 input

T0CKI

—

Timer0 clock input

INT

—

External interrupt

GPA3/AN3

GPA3

TTL

CMOS

General purpose I/O

AN3

—

A/D Channel 3 input

GPA4

TTL

General purpose I/O

GPA5/MCLR

GPA5

TTL

—

General purpose input only

MCLR

—

Master Clear with internal pull-up

GPA6

CMOS

General purpose I/O

GPA7/SCL

GPA7

General purpose open drain I/O

SCL

I2COD

I2C clock

GPB0/SDA

GPB0

TTL

SDA

I2COD

I2C data input/output

GPB1/AN4/EAPIN

GPB1

TTL

CMOS

General purpose I/O

AN4

—

A/D Channel 4 input

EAPIN

—

Error amplifier signal input/output (3)

GPB2/AN5

GPB2

TTL

CMOS

General purpose I/O

AN5

—

A/D Channel 5 input

GPB4/AN6/ICSPDAT

GPB4

TTL

CMOS

General purpose I/O

AN6

—

A/D Channel 6 input

ICSPDAT

CMOS

Primary Serial Programming Data I/O

Legend:

AN = Analog input or output

CMOS =CMOS compatible input or output

OD = Open Drain

TTL = TTL compatible input

=Schmitt Trigger input with CMOS levels

I2C = Schmitt Trigger input with I2C

Note

Analog Test is selected when the ATSTCON<BNCHEN> bit is set.

Selected when device is functioning as multiple output master or slave by proper configuration of the MLTPH<2:0> bits

in the BUFFCON register.

Selected when device is functioning as multi-phase master or slave by proper configuration of the MLTPH<2:0> bits in

the BUFFCON register.

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