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OPTION_REG Folha de dados(PDF) 39 Page - Microchip Technology

Nome de Peças OPTION_REG
Descrição Electrónicos  Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver
PDF  222 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

OPTION_REG Folha de dados(HTML) 39 Page - Microchip Technology

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 2013 Microchip Technology Inc.
DS22331A-page 39
MCP19111
6.4
Current Sense DC Gain
DC gain can be added to the sensed inductor current to
allow it to be read by the ADC. The amount of DC gain
added is controlled by the CSDGCON register.
Adding DC gain to the current sense signal used by the
control loop may also be needed in some multi-phase
systems to account for device and component
differences. The CSDGEN bit determines if the gained
current sense signal is added back to the AC current
signal (see Register 6-4). If the CSDGEN bit is cleared,
DC gain can still be added, but the gained signal is not
added back to the AC current signal.
REGISTER 6-4:
CSDGCON: CURRENT SENSE DC GAIN CONTROL REGISTER
R/W-0
U-0
U-0
U-0
R/W-x
R/W-x
R/W-x
R/W-x
CSDGEN
—
—
—
Reserved
CSDG2
CSDG1
CSDG0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CSDGEN: Current Sense DC Gain Enable bit
1
= DC gain current sense signal used in control loop.
0
= DC gain current sense signal only read by ADC.
bit 6-4
Unimplemented: Read as ‘0’
bit 3
Reserved
bit 2-0
CSDG<2:0>: Current Sense DC Gain Setting bits
000
= 19.5 dB
001
= 21.8 dB
010
= 24.1 dB
011
= 26.3 dB
100
= 28.6 dB
101
= 30.9 dB
110
= 33.2 dB
111
= 35.7 dB



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