OPTION_REG datasheet(96/222 Pages) MICROCHIP

96 / 222 page

MCP19111

DS22331A-page 96

 2013 Microchip Technology Inc.

15.3.1.3

PIR1 Register

The PIR1 register contains the Peripheral Interrupt

Flag bits, as shown in Register 15-4.

Note 1: Interrupt flag bits are set when an

interrupt condition occurs, regardless of

the state of its corresponding enable bit

or the Global Enable bit, GIE of the

INTCON register. User software should

ensure the appropriate interrupt flag bits

are clear prior to enabling an interrupt.

PIR1 – PERIPHERAL INTERRUPT FLAG REGISTER 1

U-0

R/W-0

U-0

R/W-0

—

ADIF

BCLIF

SSPIF

—

TMR2IF

TMR1IF

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

UNIMPLEMENTED: Read as '0'

bit 6

ADIF: ADC Interrupt Flag bit

= ADC conversion complete

= ADC conversion has not completed or has not been started

bit 5

BCLIF: MSSP Bus Collision Interrupt Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 4

SSPIF: Synchronous Serial Port (MSSP) Interrupt Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 3-2

UNIMPLEMENTED: Read as '0'

bit 1

TMR2IF: Timer2 to PR2 Match Interrupt Flag

= Timer2 to PR2 match occurred (must be cleared in software)

= Timer2 to PR2 match did not occur

bit 0

TMR1IF: Timer1 Interrupt Flag

= Timer1 rolled over (must be cleared in software)

= Timer1 has not rolled over

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