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OPTION_REG Folha de dados(PDF) 36 Page - Microchip Technology |
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OPTION_REG Folha de dados(HTML) 36 Page - Microchip Technology |
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36 / 222 page ![]() MCP19111 DS22331A-page 36 2013 Microchip Technology Inc. 6.2 Output Overcurrent The MCP19111 features a cycle-by-cycle peak current limit. By monitoring the OCIF interrupt flag, custom overcurrent fault handling can be implemented. To detect an output overcurrent, the MCP19111 senses the voltage drop across the high-side MOSFET while it is conducting. Leading edge blanking is incorporated to mask the overcurrent measurement for a given amount of time. This helps prevent false overcurrent readings. When the input voltage is greater than 20V, or if the RDSON of the high-side MOSFET is such that the programmed overcurrent threshold does not produce acceptable peak overcurrent protection, an alternative method must be used to determine an output overcurrent situation. An alternative technique can use the configurable output under voltage protection and the PE1<UVTEE> bit to quickly terminate switching when the output voltage drops because of an overcurrent event. When an output overcurrent is sensed, the OCIF flag is set and the high-side drive signal is immediately terminated. Without any custom overcurrent handling implemented, the high-side drive signal will be asserted high at the beginning of the next clock cycle. If the overcurrent condition still exists, the high-drive signal will again be terminated. The OCIF interrupt flag must be cleared in software. However, if a subsequent switching cycle without an overcurrent condition has not occurred, hardware will immediately set the OCIF interrupt flag. Register OCCON contains the bits used to configure both the output overcurrent limit and the amount of leading edge blanking (see Register 6-2). The OCCON<OCEN> bit must be set to enable the input under voltage lockout circuitry. Note: The OCIF interrupt flag bit is set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit, GIE, of the INTCON register. |
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