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HD64F2149YV Folha de dados(PDF) 926 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV Folha de dados(HTML) 926 Page - Renesas Technology Corp

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Appendix B Internal I/O Registers
Rev. 3.00 Jan 18, 2006 page 898 of 1044
REJ09B0280-0300
IDR3—Input Data Register 3
H'FE30
HIF (LPC)
IDR1—Input Data Register 1
H'FE38
HIF (LPC)
IDR2—Input Data Register 2
H'FE3C
HIF (LPC)
7
Bit 7
—
R
W
6
Bit 6
—
R
W
5
Bit 5
—
R
W
4
Bit 4
—
R
W
Written by host using I/O address in table below*
3
Bit 3
—
R
W
0
Bit 0
—
R
W
2
Bit 2
—
R
W
1
Bit 1
—
R
W
Bit
Initial value
Slave Read/Write
Host Read/Write
I/O address
Host register
selection
Transfer
cycle
Bits 15 to 4
Bit 3
0
0
0
0
Bit 2
0
1
0
1
Bit 1
0
0
1
1
Bit 0
0
0
0
0
I/O write
I/O write
I/O write
I/O write
IDR1 write, C/
D1 ← 0
IDR1 write, C/
D1 ← 1
IDR2 write, C/
D2 ← 0
IDR2 write, C/
D2 ← 1
0000 0000 0110
0000 0000 0110
0000 0000 0110
0000 0000 0110
Note: * For information on IDR3 selection, see section 18B.2.4, LPC Channel 3
Address Register (LADR3).



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