HD64F2149YV datasheet(671/1075 Pages) RENESAS

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Section 18B Host Interface LPC Interface (LPC)

Rev. 3.00 Jan 18, 2006 page 643 of 1044

REJ09B0280-0300

Table 18B.6 Scope of Initialization in Each Host Interface Mode

Items Initialized

System

Reset

LPC Reset

LPC

Shutdown

LPC transfer cycle sequencer (internal state),

LPCBSY and ABRT flags

Initialized

SERIRQ transfer cycle sequencer (internal state),

CLKREQ and IRQBSY flags

Initialized

Host interface flags

(IBF1, IBF2, IBF3A, IBF3B, MWMF, C/

D1, C/D2,

D3, OBF1, OBF2, OBF3A, OBF3B, SWMF, DBU),

GA20 (internal state)

Initialized

Retained

Host interrupt enable bits

(IRQ1E1, IRQ12E1, SMIE2, IRQ6E2,

IRQ9E2 to IRQ11E2, SMIE3B, SMIE3A, IRQ6E3,

IRQ9E3 to IRQ11E3), Q/

C flag

Initialized

Retained

LRST flag

Initialized

(0)

Can be

set/cleared

Can be

set/cleared

SDWN flag

Initialized

(0)

Initialized

(0)

Can be

set/cleared

LRSTB bit

Initialized

(0)

HR: 0

SR: 1

0 (can be set)

SDWNB bit

Initialized

(0)

Initialized

(0)

HS: 0

SS: 1

SDWNE bit

Initialized

(0)

Initialized

(0)

HS: 1

SS: 0 or 1

Host interface operation control bits

(LPC3E to LPC1E, FGA20E, LADR3,

IBFIE1 to IBFIE3, PMEE, PMEB, LSMIE, LSMIB,

LSCIE, LSCIB)

Initialized

Retained

LRESET signal

Input (port

Input

LPCPD signal

function)

Input

LAD3 to LAD0,

LFRAME, LCLK, SERIRQ,

CLKRUN signals

Input

Hi-Z

PME, LSMI, LSCI, GA20 signals (when function

is selected)

Output

Hi-Z

PME, LSMI, LSCI, GA20 signals (when function

is not selected)

Port function

Notes: System reset: Reset by STBY input, RES input, or WDT overflow

LPC reset: Reset by LPC hardware reset (HR) or LPC software reset (SR)

LPC shutdown: Reset by LPC hardware shutdown (HS) or LPC software shutdown (SS)

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