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HD64F2149YV Folha de dados(PDF) 674 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
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Section 18B Host Interface LPC Interface (LPC)
Rev. 3.00 Jan 18, 2006 page 646 of 1044
REJ09B0280-0300
Serial Interrupt Transfer Cycle
Frame
Count
Contents
Drive
Source
Number
of States
Notes
0Start
Slave
Host
6
In quiet mode only, slave drive possible in first
state, then next 3 states 0-driven by host
1HIRQ0
Slave
3
2
HIRQ1
Slave
3
Drive possible in LPC channel 1
3
SMI
Slave
3
Drive possible in LPC channels 2 and 3
4HIRQ3
Slave
3
5HIRQ4
Slave
3
6HIRQ5
Slave
3
7
HIRQ6
Slave
3
Drive possible in LPC channels 2 and 3
8HIRQ7
Slave
3
9HIRQ8
Slave
3
10
HIRQ9
Slave
3
Drive possible in LPC channels 2 and 3
11
HIRQ10
Slave
3
Drive possible in LPC channels 2 and 3
12
HIRQ11
Slave
3
Drive possible in LPC channels 2 and 3
13
HIRQ12
Slave
3
Drive possible in LPC channel 1
14
HIRQ13
Slave
3
15
HIRQ14
Slave
3
16
HIRQ15
Slave
3
17
IOCHCK
Slave
3
18
Stop
Host
Undefined
First, 1 or more idle states, then 2 or 3 states
0-driven by host
2 states: Quiet mode next
3 states: Continuous mode next
There are two modes—continuous mode and quiet mode—for serialized interrupts. The mode
initiated in the next transfer cycle is selected by the stop frame of the serialized interrupt transfer
cycle that ended before that cycle.
In continuous mode, the host initiates host interrupt transfer cycles at regular intervals. In quiet
mode, the slave processor with interrupt sources requiring a request can also initiate an interrupt
transfer cycle, in addition to the host. In quiet mode, since the host does not necessarily initiate
interrupt transfer cycles, it is possible to suspend the clock (LCLK) supply and enter the power-
down state. In order for a slave to transfer an interrupt request in this case, a request to restart the



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