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HD64F2149YV Folha de dados(PDF) 637 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
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Section 18B Host Interface LPC Interface (LPC)
Rev. 3.00 Jan 18, 2006 page 609 of 1044
REJ09B0280-0300
18B.2
Register Descriptions
18B.2.1 System Control Registers (SYSCR, SYSCR2)
• SYSCR
Bit
7
654321
0
CS2E
IOSE
INTM1
INTM0
XRST
NMIEG
HIE
RAME
Initial value
0
000100
1
Read/Write
R/W
R/W
R
R/W
R
R/W
R/W
R/W
• SYSCR2
Bit
7
654321
0
KWUL1
KWUL0
P6PUE
—
SDE
CS4E
CS3E
HI12E
Initial value
0
000000
0
Read/Write
R/W
R/W
R/W
—
R/W
R/W
R/W
R/W
SYSCR and SYSCR2 are 8-bit readable/writable registers that control the chip operations. The
settings of HIF:XBS related bits do not affect the operation of the chip’s HIF:LPC. However, for
reasons relating to the configuration of the program development tool (emulator), when the
HIF:LPC is used, bit HI12E in SYSCR2 should not be set to 1.
For details of the individual bits, see section 18A.2.1, System Control Register (SYSCR), section
18A.2.2, System Control Register 2 (SYSCR2), section 3.2.2, System Control Register (SYSCR),
section 5.2.1, System Control Register (SYSCR), and section 8, I/O Ports.
SYSCR and SYSCR2 are initialized to H'09 and H'00, respectively, by a reset and in hardware
standby mode.



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