HD64F2149YV datasheet(577/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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Section 16 I

2C Bus Interface

Rev. 3.00 Jan 18, 2006 page 549 of 1044

REJ09B0280-0300

• Notes on Start Condition Issuance for Retransmission

Figure 16.18 shows the timing of start condition issuance for retransmission, and the timing for

subsequently writing data to ICDR, together with the corresponding flowchart. After start

condition issuance is done and determined the start condition, write the transmit data to ICDR,

as shown below.

Read SCL pin

Write transmit data to ICDR

Clear IRIC in ICSR

Write BBSY = 1,

SCP = 0 (ICSR)

IRIC = 1 ?

SCL = Low ?

Yes

Start condition

issuance ?

[1]

[2]

[3]

[4]

[5]

[1]

[2]

[3]

[4]

[5]

Wait for end of 1-byte transfer

Determine whether SCL is low

Issue restart condition instruction for transmission

Detremine whether start condition is generated or not

Set transmit data (slave address + R/

Note: Program so that processing from [3] to [5] is

executed continuously.

Other processing

Yes

IRIC = 1 ?

Yes

SCL

bit7

Data output

ACK

IRIC

[1] IRIC determination [2] Determination

of SCL = Low

[5] ICDR write (next transmit data)

SDA

[3] Start condition instruction

issuance

start condition

(retransmission)

[4] IRIC determination

Figure 16.19 Flowchart and Timing of Start Condition Instruction Issuance for

Retransmission

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