BQ25708 datasheet(62/77 Pages) TI2

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CIN

CHG

= I

D × (1

bq25708

SLUSCU2 – NOVEMBER 2017

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During boost operation, the duty cycle is:

DBOOST = 1 – (VBAT/VIN)

and the ripple current is:

IRIPPLE_BOOST = DBOOST x fS x VBAT/LBOOST

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging

voltage range is from 9 V to 12.6 V for 3-cell battery pack. For 20 V adapter voltage, 10 V battery voltage gives

the maximum inductor ripple current. Another example is 4-cell battery, the battery voltage range is from 12 V to

16.8 V, and 12 V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20-40%) maximum charging current as a trade-off between

inductor size and efficiency for a practical design.

9.2.2.3 Input Capacitor

Bulk input capacitors should be locate in front of input current sensing resistor. Do not recommend to put bulk

input capacitors between input sensing resistor and switching MOSFET. Input capacitor should have enough

ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the

charging current when duty cycle is 0.5 in buck mode. If the converter does not operate at 50% duty cycle, then

the worst case capacitor RMS current occurs where the duty cycle is closest to 50% and can be estimated by

Equation 5:

(5)

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be

placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage

rating of the capacitor must be higher than normal input voltage level. 25 V rating or higher capacitor is preferred

for 19-20 V input voltage. Minimum 10uF effective capacitance (7 pcs of 10uF 0805 size capacitor) is suggested

for 45 W-65 W adapter.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is

applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant

capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's

datasheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage

rating or nominal capacitance value in order to get the required value at the operating point.

9.2.2.4 Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. In buck

mode the output capacitor RMS current is given:

To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed

between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25V X7R or X5R for output capacitor. Minimum

10uF effective capacitance (7 pcs of 10uF 0805 size capacitor) is suggested to be placed after the Q4 drain, and

50uF effective distributed capacitance on Vsys output. Place minimum 10uF after the charge current sense

resistor for best stability.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is

applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant

capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data

sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage

rating or nominal capacitance value in order to get the required value at the operating point.

9.2.2.5 Power MOSFETs Selection

Four external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are

internally integrated into the IC with 6V of gate drive voltage. 30 V or higher voltage rating MOSFETs are

preferred for 19-20 V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction

loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance,

RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the

MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.

FOMtop = RDS(on) x QGD; FOMbottom = RDS(on) x QG

(6)

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