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BQ25708 Folha de dados(PDF) 42 Page - Texas Instruments

Nome de Peças BQ25708
Descrição Electrónicos  bq25708 SMBus Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor
PDF  77 Pages
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Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
Logo TI2 - Texas Instruments

BQ25708 Folha de dados(HTML) 42 Page - Texas Instruments

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bq25708
SLUSCU2 – NOVEMBER 2017
www.ti.com
Product Folder Links: bq25708
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Copyright © 2017, Texas Instruments Incorporated
8.6.1.7 ADCOption Register (SMBus address = 35h) [reset = 2000h]
Figure 19. ADCOption Register (SMBus address = 35h) [reset = 2000h]
15
14
13
12-8
ADC_CONV
ADC_START
ADC_
FULLSCALE
Reserved
R/W
R/W
R/W
R/W
7
6
5
4
3
2
1
0
EN_ADC_
CMPIN
EN_ADC_
VBUS
EN_ADC_
PSYS
EN_ADC_
IIN
EN_ADC_
IDCHG
EN_ADC_
ICHG
EN_ADC_
VSYS
EN_ADC_
VBAT
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19. ADCOption Register (SMBus address = 35h) Field Descriptions
SMBus
BIT
FIELD
TYPE
RESET
DESCRIPTION
15
ADC_CONV
R/W
0b
Typical ADC conversion time is 10 ms.
0b: One-shot update. Do one set of conversion updates to registers
REG0x23(), REG0x24(), REG0x25(), and REG0x26() after ADC_START =
1.
1b: Continuous update. Do a set of conversion updates to registers
REG0x23(), REG0x24(), REG0x25(), and REG0x26() every 1 sec.
14
ADC_START
R/W
0b
0b: No ADC conversion
1b: Start ADC conversion. After the one-shot update is complete, this bit
automatically resets to zero
13
ADC_
FULLSCALE
R/W
1b
ADC input voltage range. When input voltage is below 5V, or battery is 1S,
full scale 2.04V is recommended.
0b: 2.04 V
1b: 3.06 V <default at POR>
12-8
Reserved
R/W
00000b
Reserved
Table 20. ADCOption Register (SMBus address = 35h) Field Descriptions
SMBus
BIT
FIELD
TYPE
RESET
DESCRIPTION
7
EN_ADC_CMPIN
R/W
0b
0b: Disable <default at POR>
1b: Enable
6
EN_ADC_VBUS
R/W
0b
0b: Disable <default at POR>
1b: Enable
5
EN_ADC_PSYS
R/W
0b
0b: Disable <default at POR>
1b: Enable
4
EN_ADC_IIN
R/W
0b
0b: Disable <default at POR>
1b: Enable
3
EN_ADC_IDCHG
R/W
0b
0b: Disable <default at POR>
1b: Enable
2
EN_ADC_ICHG
R/W
0b
0b: Disable <default at POR>
1b: Enable
1
EN_ADC_VSYS
R/W
0b
0b: Disable <default at POR>
1b: Enable
0
EN_ADC_VBAT
R/W
0b
0b: Disable <default at POR>
1b: Enable



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