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BQ25708 Folha de dados(PDF) 16 Page - Texas Instruments |
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BQ25708 Folha de dados(HTML) 16 Page - Texas Instruments |
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16 / 77 page ![]() 16 bq25708 SLUSCU2 – NOVEMBER 2017 www.ti.com Product Folder Links: bq25708 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Devices participating in a transfer will timeout when any clock low exceeds the 25ms minimum timeout period. Devices that have detected a timeout condition must reset the communication no later than the 35 ms maximum timeout period. Both a master and a slave must adhere to the maximum value specified as it incorporates the cumulative stretch limit for both a master (10 ms) and a slave (25 ms). (2) User can adjust threshold via SMBus ChargeOption() REG0x12. 7.6 Timing Requirements MIN TYP MAX UNIT SMBus TIMING CHARACTERISTICS tr SCLK/SDATA rise time 1 µs tf SCLK/SDATA fall time 300 ns tW(H) SCLK pulse width high 4 50 µs tW(L) SCLK Pulse Width Low 4.7 µs tSU(STA) Setup time for START condition 4.7 µs tH(STA) START condition hold time after which first clock pulse is generated 4 µs tSU(DAT) Data setup time 250 µs tH(DTA) Data hold time 300 µs tSU(STOP) Setup time for STOP condition 4 µs t(BUF) Bus free time between START and STOP condition 4.7 µs FS(CL) Clock Frequency 10 100 KHz HOST COMMUNICATION FAILURE ttimeout SMBus bus release timeout(1) 25 35 ms tBOOT Deglitch for watchdog reset signal 10 ms tWDI Watchdog timeout period, ChargeOption() bit [14:13] = 01(2) 35 44 53 s Watchdog timeout period, ChargeOption() bit [14:13] = 10 (2) 70 88 105 s Watchdog timeout period, ChargeOption() bit [14:13] = 11 (2) (default) 140 175 210 s |
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