BQ25708 datasheet(27/77 Pages) TI2

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bq25708

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SLUSCU2 – NOVEMBER 2017

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8.5 Programming

The charger supports battery-charger commands that use either Write-Word or Read-Word protocols, as

summarized in SMBus Write-Word and Read-Word Protocols. The SMBUS address is 12h (0001001_X), where

X is the read/write bit. The ManufacturerID and DeviceID registers are assigned identify the charger device. The

ManufacturerID register command always returns 40h.

8.5.1 SMBus Interface

The bq25700 device operates as a slave, receiving control inputs from the embedded controller host through the

SMBus interface. The bq25700 device uses a simplified subset of the commands documented in System

Management Bus Specification V1.1, which can be downloaded from www.smbus.org. The bq25700 device uses

the SMBus read-word and write-word protocols (shown in Table 4 and Table 5) to communicate with the smart

battery. The bq25700 device performs only as a SMBus slave device with address 0b00010010 (0x12H) and

does not initiate communication on the bus. In addition, the bq25700 device has two identification registers, a 16-

bit device ID register (0xFFH) and a 16-bit manufacturer ID register (0xFEH).

SMBus communication starts when VCC is above V(UVLO).

The data (SDA) and clock (SCL) pins have Schmitt-trigger inputs that can accommodate slow edges. Choose

pullup resistors (10 kΩ) for SDA and SCL to achieve rise times according to the SMBus specifications.

Communication starts when the master signals a start condition, which is a high-to-low transition on SDA, while

SCL is high. When the master has finished communicating, the master issues a stop condition, which is a low-to-

high transition on SDA, while SCL is high. The bus is then free for another transmission. Figure 11 and Figure 12

show the timing diagram for signals on the SMBus interface. The address byte, command byte, and data bytes

are transmitted between the start and stop conditions. The SDA state changes only while SCL is low, except for

the start and stop conditions. Data is transmitted in 8-bit bytes and is sampled on the rising edge of SCL. Nine

clock cycles are required to transfer each byte in or out of the bq25708 device because either the master or the

slave acknowledges the receipt of the correct byte during the ninth clock cycle. The bq25708 supports the

charger commands listed in Table 4.

BQ25708 Folha de dados(PDF) 27 Page - Texas Instruments