MPC8280_07 datasheet(95/1386 Pages) FREESCALE

95 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

1-1

Chapter 1

Overview

The MPC8280 is a versatile communications processor that integrates on one chip a high-performance

PowerPC™ RISC microprocessor, a very flexible system integration unit, and many communications

peripheral controllers that can be used in a variety of applications, particularly in communications and

networking systems.

The MPC8280 core—a G2_LE—is an embedded variant of the MPC603e microprocessor with 16 Kbytes

of instruction cache and 16 Kbytes of data cache. The system interface unit (SIU) consists of a flexible

memory controller that interfaces to almost any user-defined memory system, a 60x-to-PCI bus bridge,

and many other peripherals making this device a complete system on a chip.

The MPC8280 communications processor module (CPM) includes all the peripherals found in the

MPC8260 PowerQUICC II family. In addition, the MPC8280 offers USB functionality.

This manual describes the functional operation of MPC8280, with an emphasis on peripheral functions.

Chapter 2, “G2_LE Core,” is an overview of the microprocessor core; detailed information about the core

can be found in the G2 Core Reference Manual (order number: G2CORERM).

1.1

Features

The following is an overview of the MPC8280 feature set:

•

Dual-issue integer (G2_LE) core

— A core version of the MPC603e microprocessor

— System core microprocessor supporting frequencies of 166–450 MHz

— Separate 16-Kbyte data and instruction caches:

– Four-way set associative

– Physically addressed

– LRU replacement algorithm

— PowerPC architecture-compliant memory management unit (MMU)

— Common on-chip processor (COP) test interface

— Supports bus snooping for data cache coherency

— Floating-point unit (FPU)

•

Separate power supply for internal logic and for I/O

•

Separate PLLs for G2_LE core and for the CPM

— G2_LE core and CPM can run at different frequencies for power/performance optimization

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