MPC8280_07 datasheet(45/1386 Pages) FREESCALE

45 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

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Contents

Paragraph

Number

Title

Page

Number

Chapter 37

FCC HDLC Controller

37.1

Key Features .................................................................................................................. 37-1

37.2

HDLC Channel Frame Transmission Processing .......................................................... 37-2

37.3

HDLC Channel Frame Reception Processing ............................................................... 37-3

37.4

HDLC Parameter RAM ................................................................................................. 37-3

37.5

Programming Model ...................................................................................................... 37-5

37.5.1

HDLC Command Set................................................................................................. 37-5

37.5.2

HDLC Error Handling ............................................................................................... 37-6

37.6

HDLC Mode Register (FPSMR) ................................................................................... 37-8

37.7

HDLC Receive Buffer Descriptor (RxBD).................................................................... 37-9

37.8

HDLC Transmit Buffer Descriptor (TxBD) ................................................................ 37-12

37.9

HDLC Event Register (FCCE)/Mask Register (FCCM) ............................................. 37-14

37.10

FCC Status Register (FCCS) ....................................................................................... 37-16

Chapter 38

FCC Transparent Controller

38.1

Features .......................................................................................................................... 38-1

38.2

Transparent Channel Operation ..................................................................................... 38-2

38.3

Achieving Synchronization in Transparent Mode ......................................................... 38-2

38.3.1

In-Line Synchronization Pattern................................................................................ 38-2

38.3.2

External Synchronization Signals .............................................................................. 38-3

38.3.3

Transparent Synchronization Example ...................................................................... 38-4

Chapter 39

Serial Peripheral Interface (SPI)

39.1

Features .......................................................................................................................... 39-1

39.2

SPI Clocking and Signal Functions ............................................................................... 39-2

39.3

Configuring the SPI Controller...................................................................................... 39-2

39.3.1

The SPI as a Master Device ....................................................................................... 39-3

39.3.2

The SPI as a Slave Device ......................................................................................... 39-4

39.3.3

The SPI in Multimaster Operation............................................................................. 39-4

39.4

Programming the SPI Registers ..................................................................................... 39-6

39.4.1

SPI Mode Register (SPMODE) ................................................................................. 39-6

39.4.1.1

SPI Examples with Different SPMODE[LEN] Values.......................................... 39-8

39.4.2

SPI Event/Mask Registers (SPIE/SPIM) ................................................................... 39-9

39.4.3

SPI Command Register (SPCOM) .......................................................................... 39-10

39.5

SPI Parameter RAM .................................................................................................... 39-10

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