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XTPSM81033VCDR Folha de dados(PDF) 12 Page - Texas Instruments |
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XTPSM81033VCDR Folha de dados(HTML) 12 Page - Texas Instruments |
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12 / 31 page ![]() PVIN EN VOUT FB GND L1 OFF ON C1 C2 MODE PFM PWM PG R1 R2 RDummy TPSM81033 SW AVIN Output Voltage time PG time tglitch Output voltage discharge from RDummy EN Figure 6-1. Implement Output Discharge by PG function 6.3.8 Overvoltage Protection The TPSM81033 has an output overvoltage protection (OVP) to protect the device if the external feedback resistor divider is wrongly populated. When the output voltage is above 5.75V typically, the device stops switching. Once the output voltage falls 0.1V below the OVP threshold, the device resumes operating again. 6.3.9 Output Short-to-Ground Protection The TPSM81033 starts to limit the output current when the output voltage is below 1.8V. The lower the output voltage reaches, the smaller the output current is. When the VOUT pin is short to ground, and the output voltage becomes less than 0.4V, the output current is limited to approximately 330mA. Once the short circuit is released, the TPSM81033 goes through the soft start-up again to the regulated output voltage. 6.3.10 Thermal Shutdown The TPSM81033 goes into thermal shutdown once the junction temperature exceeds 170°C. When the junction temperature drops below the thermal shutdown recovery temperature, typically 155°C, the device starts operating again. 6.4 Device Functional Modes TPSM81033 has two optional modes in light load by configuring the MODE pin: auto PFM mode and forced PWM to balance the efficiency and noise immunity in light load. 6.4.1 PWM Mode The TPSM81033 uses a quasi-constant 2.4MHz frequency pulse width modulation (PWM) at moderate to heavy load current. Based on the input voltage to output voltage ratio, a circuit predicts the required on-time. At the beginning of the switching cycle, the NMOS switching FET. The input voltage is applied across the inductor and the inductor current ramps up. In this phase, the output capacitor is discharged by the load current. When the on-time expires, the main switch NMOS FET is turned off, and the rectifier PMOS FET is turned on. The inductor transfers its stored energy to replenish the output capacitor and supply the load. The inductor current declines because the output voltage is higher than the input voltage. When the inductor current hits the valley current threshold determined by the output of the error amplifier, the next switching cycle starts again. The TPSM81033 has a built-in compensation circuit that can accommodate a wide range of input voltage, output voltage, inductor value, and output capacitor value for stable operation. 6.4.2 Power-Save Mode The TPSM81033 integrates a power-save mode with PFM to improve efficiency at light load. When the load current decreases, the inductor valley current set by the output of the error amplifier no longer regulates the output voltage. When the inductor valley current hits the low limit, the output voltage exceeds the setting voltage as the load current decreases further. When the FB voltage hits the PFM reference voltage, the TPSM81033 goes into the power-save mode. In the power-save mode, when the FB voltage rises and hits the PFM reference TPSM81033 SLVSHL0D – JUNE 2024 – REVISED DECEMBER 2024 www.ti.com 12 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TPSM81033 |
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