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XTPSM81033VCDR Folha de dados(PDF) 6 Page - Texas Instruments |
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XTPSM81033VCDR Folha de dados(HTML) 6 Page - Texas Instruments |
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6 / 31 page ![]() 5.6 System Characteristics The following specifications apply to a typical application circuit with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25℃ only. Specifications in the minimum (MIN) and maximum (MAX) columns apply to the case of typical components over the temperature range of TJ = –40℃ to 125℃. These specifications are not specified by production testing. PARAMETERS TEST CONDITIONS MIN NOM MAX UNIT VIN Operating input voltage range 1.8 5.5 V VOUT Output voltage load regulation(1) Auto PFM, internal divider, FB connected to AVIN 1 1.4 % Output voltage load regulation(1) FPWM, internal divider, FB connected to AVIN 1 0.2 % Output voltage load regulation(1) Auto PFM, external divider 4.2 1.4 % Output voltage load regulation(1) FPWM, external divider 4.2 0.2 % tSTARTUP Start-up time with 0V pre-bias voltage VIN = 3.6V, VOUT = 5V, IOUT = 0A, COUT is 4pcs 22uF/ 0603/6.3V/X5R 800 µs (1) Deviation in VOUT from nominal output voltage value at VIN = 3.6V, VOUT = 5.0V, IOUT = 1mA to 1A. The max value is calculated by (VOUT_MAX - VOUT_SET) / VOUT_SET * 100%, the min value is calculated by (VOUT_MIN - VOUT_SET) / VOUT_SET * 100%. TPSM81033 SLVSHL0D – JUNE 2024 – REVISED DECEMBER 2024 www.ti.com 6 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TPSM81033 |
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