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ATXP032 Folha de dados(PDF) 39 Page - Dialog Semiconductor |
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ATXP032 Folha de dados(HTML) 39 Page - Dialog Semiconductor |
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39 / 113 page ![]() 37 ATXP032 DS-ATXP032–114I–4-2020 9.6 Program/Erase Suspend (B0h) The Program/Erase Suspend command allows a program operation to be started while a block erase operation is in progress. Once an on-going block erase operation has been suspended, a program operation (in a different 2- Mbit Sector than the one suspended) may be started. Once the program operation has finished, the erase operation can be resumed using the Program/Erase Resume (D0h) operation. Suspending a program operation does not allow another program operation to be started. The Program/Erase Suspend command also allows operations within the same memory bank as long as the operations are in different 2-Mbit sectors. In some code plus data storage applications, it is often necessary to process certain high-level system interrupts that require relatively immediate reading or writing of code or data from the Flash memory. In such an instance, it may not be possible for the system to wait the microseconds or milliseconds required for the Flash memory to complete a program or erase cycle. The Program/Erase Suspend command allows a program or erase operation in progress to a particular 2-Mbit sector of the Flash memory array to be suspended so that other device operations can be performed. For example, by suspending an erase operation to a particular block in a 2-Mbit sector, the system can perform functions such as a program or read operation within another 2-Mbit sector in the device. The two sectors can reside within the same memory bank. Only Block Erase commands may be suspended. A Chip Erase command cannot be suspended. The Program/Erase Suspend command will be ignored if it is issued during a chip erase. Other device operations can also be performed while a program or erase operation is suspended. Table 10-2 outlines the operations that are allowed and not allowed during a program or erase suspend. Since the need to suspend a program or erase operation is immediate, the Write Enable command does not need to be issued prior to the Program/Erase Suspend command being issued. Therefore, the Program/Erase Suspend command operates independently of the state of the WEL bit in the Status/Control register. To perform a program/erase suspend operation, the CS pin must first be asserted and the B0h command must be clocked into the device. No address bytes need to be clocked into the device, and any data clocked in after the command is ignored. When the CS pin is deasserted, the program or erase operation currently in progress is suspended within a time of tSUSP.. The Program Suspend (PS) or Erase Suspend (ES) bit in Status/Control Register Byte 2 is set to the logic “1” state to indicate that the program or erase operation has been suspended. In addition, the RDY/BSY bit in the Status/Control register indicates that the device is ready for another operation. The complete command must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on a byte boundary (multiples of eight bits). Otherwise, no suspend operation is performed. Read operations are not allowed to a 2-Mbit sector that has had its program or erase operation suspended. If a read is attempted from a suspended block, the device outputs undefined data. Therefore, when performing a read array operation to an unsuspended block and the device's internal address counter increments and crosses the block boundary to a suspended block, the device starts outputting undefined data continuously until the address counter increments and crosses a block boundary to an unsuspended block. A program operation is not allowed to a 2-Mbit sector that has been erase suspended. If a program operation is attempted to an erase suspended block, then the program operation aborts and the WEL bit in the Status/Control register is reset back to the logic “0” state. During an erase/suspend operation, a program operation to a different 2-Mbit sector can be started and subsequently suspended. This results in a simultaneous erase suspend/program suspend condition and is indicated by the states of both the ES and PS bits in the Status/Control register being set to the logic “1” state. Another erase operation cannot be started while in the erase suspend state. Neither program nor erase commands are allowed during a program suspend operation. If attempted, the operation is aborted. If an attempt is made to perform an operation that is not allowed during a program or erase suspend operation, such as executing a Write Status Register command, then the device simply ignores the command and no operation is performed. The state of the WEL bit in the Status/Control register is not affected. |
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