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COP8CCR9KMT7 Folha de dados(PDF) 65 Page - National Semiconductor (TI) |
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COP8CCR9KMT7 Folha de dados(HTML) 65 Page - National Semiconductor (TI) |
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65 / 84 page ![]() 18.0 MICROWIRE/PLUS (Continued) 18.1.2.1 Alternate SK Phase Operation and SK Idle Polarity The device allows either the normal SK clock or an alternate phase SK clock to shift data in and out of the SIO register. In both the modes the SK idle polarity can be either high or low. The polarity is selected by bit 5 of Port G data register. In the normal mode data is shifted in on the rising edge of the SK clock and the data is shifted out on the falling edge of the SK clock. The SIO register is shifted on each falling edge of the SK clock. In the alternate SK phase operation, data is shifted in on the falling edge of the SK clock and shifted out on the rising edge of the SK clock. Bit 6 of Port G configuration register selects the SK edge. A control flag, SKSEL, allows either the normal SK clock or the alternate SK clock to be selected. Refer to Table 32 for the appropriate setting of the SKSEL bit. The SKSEL is mapped into the G6 configuration bit. The SKSEL flag will power up in the reset condition, selecting the normal SK signal provided the SK Idle Polarity remains LOW. TABLE 32. MICROWIRE/PLUS Shift Clock Polarity and Sample/Shift Phase Port G SO Clocked Out On: SI Sampled On: SK Idle Phase SK Phase G6 (SKSEL) Config. Bit G5 Data Bit Normal 0 0 SK Falling Edge SK Rising Edge Low Alternate 1 0 SK Rising Edge SK Falling Edge Low Alternate 0 1 SK Rising Edge SK Falling Edge High Normal 1 1 SK Falling Edge SK Rising Edge High 10137436 FIGURE 33. MICROWIRE/PLUS SPI Mode Interface Timing, Normal SK Mode, SK Idle Phase being Low 10137437 FIGURE 34. MICROWIRE/PLUS SPI Mode Interface Timing, Alternate SK Mode, SK Idle Phase being Low www.national.com 65 |
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