COP8CCR9KMT7 datasheet(52/84 Pages) NSC

52 / 84 page

15.0 A/D Converter (Continued)

15.1 OPERATING MODES

It supports both Single Ended and Differential modes of

operation.

Two specific analog channel selection modes are supported.

These are as follows:

Allow any specific channel to be selected at one time.

The A/D Converter performs the specific conversion re-

quested and stops.

Allow any differential channel pair to be selected at one

time. The A/D Converter performs the specific differen-

tial conversion requested and stops.

In both Single Ended and Differential modes, there is the

capability to connect the analog multiplexor output and A/D

converter input to external pins. This provides the ability to

externally connect a common filter/signal conditioning circuit

for the A/D Converter.

The A/D Converter is supported by three memory mapped

registers: two result registers and the control register. When

the device is reset, the mode control register (ENAD) is

cleared, the A/D is powered down and the A/D result regis-

ters have unknown data.

15.1.1 A/D Control Register

The control register, ENAD, contains 4 bits for channel se-

lection, 1 bit for mode selection, 1 bit for the multiplexor

output selection, 1 bit for prescaler selection, and a Busy bit.

An A/D conversion is initiated by setting the ADBSY bit in the

ENAD control register. The result of the conversion is avail-

able to the user in the A/D result registers, ADRSTH and

ADRSTL, when ADBSY is cleared by the hardware on

completion of the conversion.

TABLE 19. ENAD

Bit 7

Bit 0

Channel Select

Mode Select Mux/Out Prescale

Busy

ADCH3 ADCH2 ADCH1 ADCH0

ADMOD

MUX

PSC

ADBSY

15.1.1.1 Channel Select

This 4-bit field selects one of sixteen channels to be the V

IN+.

The mode selection and the mux output determine the V

IN-

input. When MUX = 0, all sixteen channels are available, as

shown in Table 20. When MUX = 1, only fourteen channels

are available, as shown in Table 21.

All port pins which are used, in the application, in A/D opera-

tions must be configured as high-impedance inputs. If the

ports are configured as outputs or inputs with weak pull-up

there will be a conflict between the analog signal and the

digitally driven output.

TABLE 20. A/D Converter Channel Selection when the Multiplexor Output is Disabled

Select Bits

Mode Select

ADMOD = 0

Single Ended

Mode

Mode Select

ADMOD = 1

Differential

Mode

Mux Output

Disabled

ADCH3

ADCH2

ADCH1

ADCH0

Channel No.

Channel Pairs

(+, −)

MUX

00000

0, 1

00011

1, 0

00102

2, 3

00113

3, 2

01004

4, 5

01015

5, 4

01106

6, 7

01117

7, 6

10008

8, 9

10019

9, 8

1010

10, 11

1011

11, 10

1100

12, 13

1101

13, 12

1110

14, 15

1111

15, 14

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