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PCIF0 Folha de dados(PDF) 286 Page - ATMEL Corporation

Nome de Peças PCIF0
Descrição Electrónicos  High Performance, Low Power Atmel AVR 8-bit Microcontroller Advanced RISC Architecture
PDF  294 Pages
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Fabricante Electrônico  ATMEL [ATMEL Corporation]
Página de início  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

PCIF0 Folha de dados(HTML) 286 Page - ATMEL Corporation

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286
9219A–RFID–01/11
Atmel ATA5505 [Preliminary]
0x21 (0x41)
EEARL
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
page 25
0x20 (0x40)
EEDR
EEDR7
EEDR6
EEDR5
EEDR4
EEDR3
EEDR2
EEDR1
EEDR0
page 26
0x1F (0x3F)
EECR
–
–
EEPM1
EEPM0
EERIE
EEMPE
EEPE
EERE
page 26
0x1E (0x3E)
GPIOR0
GPIOR07
GPIOR06
GPIOR05
GPIOR04
GPIOR03
GPIOR02
GPIOR01
GPIOR00
page 27
0x1D (0x3D)
EIMSK
–
–
–
–
–
–INT1
INT0
page 66
0x1C (0x3C)
EIFR
–
–
–
–
–
–
INTF1
INTF0
page 67
0x1B (0x3B)
PCIFR
–
–
–
–
–
–
PCIF1
PCIF0
page 68
0x1A (0x3A)
Reserved
0x19 (0x39)
Reserved
0x18 (0x38)
Reserved
0x17 (0x37)
Reserved
0x16 (0x36)
TIFR1
–
–ICF1
–
–
OCF1B
OCF1A
TOV1
page 142
0x15 (0x35)
TIFR0
–
–
–
–
–
–OCF0A
TOV0
page 108
0x14 (0x34)
Reserved
0x13 (0x33)
Reserved
0x12 (0x32)
PORTCR
–
–
BBMB
BBMA
–
–
PUDB
PUDA
page 78
0x11 (0x31)
Reserved
0x10 (0x30)
Reserved
0x0F (0x2F)
Reserved
0x0E (0x2E)
Reserved
0x0D (0x2D)
Reserved
0x0C (0x2C)
Reserved
0x0B (0x2B)
Reserved
0x0A (0x2A)
Reserved
0x09 (0x29)
Reserved
0x08 (0x28)
Reserved
0x07 (0x27)
Reserved
0x06 (0x26)
Reserved
0x05 (0x25)
PORTB
PORTB7
PORTB6
PORTB5
PORTB4
PORTB3
PORTB2
PORTB1
PORTB0
page 89
0x04 (0x24)
DDRB
DDB7
DDB6
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
page 89
0x03 (0x23)
PINB
PINB7
PINB6
PINB5
PINB4
PINB3
PINB2
PINB1
PINB0
page 89
0x02 (0x22)
PORTA
PORTA7
PORTA6
PORTA5
PORTA4
PORTA3
PORTA2
PORTA1
PORTA0
page 89
0x01 (0x21)
DDRA
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
page 89
0x00 (0x20)
PINA
PINA7
PINA6
PINA5
PINA4
PINA3
PINA2
PINA1
PINA0
page 89
26. Register Summary (Continued)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
Notes:
1. Address bits exceeding EEAMSB (Table 22-8 on page 239) are don’t care.
2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
3. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other Atmel® AVR®s, the CBI
and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status
flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel AVR is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN
and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used



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