PCIF0 datasheet(70/294 Pages) ATMEL

70 / 294 page

9219A–RFID–01/11

Atmel ATA5505 [Preliminary]

I/O-Ports

9.1

Introduction

All Atmel

® AVR® ports have true Read-Modify-Write functionality when used as general digital

I/O ports. This means that the direction of one port pin can be changed without unintentionally

changing the direction of any other pin with the SBI and CBI instructions. The same applies

when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if

configured as input). Each output buffer has symmetrical drive characteristics with both high

sink and source capability. The pin driver is strong enough to drive LED displays directly. All

port pins have individually selectable pull-up resistors with a supply-voltage invariant resis-

tance. All I/O pins have protection diodes to both V

CC and Ground as indicated in Figure 9-1.

Refer to “Electrical Characteristics” on page 254 for a complete list of parameters.

Figure 9-1.

I/O Pin Equivalent Schematic

All registers and bit references in this section are written in general form. A lower case “x” rep-

resents the numbering letter for the port, and a lower case “n” represents the bit number.

However, when using the register or bit defines in a program, the precise form must be used.

For example, PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The

physical I/O Registers and bit locations are listed in “Register Description for I/O Ports” on

page 89.

Three I/O memory address locations are allocated for each port, one each for the Data Regis-

ter – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input

Pins I/O location is read only, while the Data Register and the Data Direction Register are

read/write. However, writing a logic one to a bit in the PINx Register, will result in a toggle in

the corresponding bit in the Data Register. In addition, the Pull-up Disable – PUD bit in

MCUCR or PUDx in PORTCR disables the pull-up function for all pins in all ports when set.

Using the I/O port as General Digital I/O is described in “Ports as General Digital I/O” on page

71. Most port pins are multiplexed with alternate functions for the peripheral features on the

device. How each alternate function interferes with the port pin is described in “Alternate Port

Functions” on page 75. Refer to the individual module sections for a full description of the

alternate functions.

Note that enabling the alternate function of some of the port pins does not affect the use of the

other pins in the port as general digital I/O.

Logic

See Figure

"General Digital I/O" for

Details

Pxn

PCIF0 Folha de dados(PDF) 70 Page - ATMEL Corporation

PCIF0 Folha de dados(HTML) 70 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL