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PCIF0 Folha de dados(PDF) 282 Page - ATMEL Corporation |
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PCIF0 Folha de dados(HTML) 282 Page - ATMEL Corporation |
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282 / 294 page ![]() 282 9219A–RFID–01/11 Atmel ATA5505 [Preliminary] 26. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0xFF) Reserved (0xFE) Reserved (0xFD) Reserved (0xFC) Reserved (0xFB) Reserved (0xFA) Reserved (0xF9) Reserved (0xF8) Reserved (0xF7) Reserved (0xF6) Reserved (0xF5) Reserved (0xF4) Reserved (0xF3) Reserved (0xF2) Reserved (0xF1) Reserved (0xF0) Reserved (0xEF) Reserved (0xEE) Reserved (0xED) Reserved (0xEC) Reserved (0xEB) Reserved (0xEA) Reserved (0xE9) Reserved (0xE8) Reserved (0xE7) Reserved (0xE6) Reserved (0xE5) Reserved (0xE4) Reserved (0xE3) Reserved (0xE2) Reserved (0xE1) Reserved (0xE0) Reserved (0xDF) Reserved (0xDE) Reserved (0xDD) Reserved (0xDC) Reserved (0xDB) Reserved (0xDA) Reserved (0xD9) Reserved (0xD8) Reserved (0xD7) Reserved (0xD6) Reserved (0xD5) Reserved (0xD4) Reserved (0xD3) Reserved (0xD2) LINDAT LDATA7 LDATA6 LDATA5 LDATA4 LDATA3 LDATA2 LDATA1 LDATA0 page 189 Notes: 1. Address bits exceeding EEAMSB (Table 22-8 on page 239) are don’t care. 2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 3. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. 4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other Atmel® AVR®s, the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel AVR is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used |
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