PCIF0 datasheet(47/294 Pages) ATMEL

47 / 294 page

9219A–RFID–01/11

Atmel ATA5505 [Preliminary]

5.2

BOD Disable

When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses, Table 22-3 on page

237, the BOD is actively monitoring the power supply voltage during a sleep period. To save

power, it is possible to disable the BOD by software for some of the sleep modes, see Table

5-1. The sleep mode power consumption will then be at the same level as when BOD is glob-

ally disabled by fuses. If BOD is disabled in software, the BOD function is turned off

immediately after entering the sleep mode. Upon wake-up from sleep, BOD is automatically

enabled again. This ensures safe operation in case the V

CC level has dropped during the sleep

period.

When the BOD has been disabled, the wake-up time from sleep mode will be approximately

60 µs to ensure that the BOD is working correctly before the MCU continues executing code.

BOD disable is controlled by BODS bit (BOD Sleep) in the control register MCUCR, see

“MCUCR – MCU Control Register” on page 51. Setting it to one turns off the BOD in relevant

sleep modes, while a zero in this bit keeps BOD active. Default setting keeps BOD active, i.e.

BODS is cleared to zero.

Writing to the BODS bit is controlled by a timed sequence and an enable bit, see “MCUCR –

MCU Control Register” on page 51.

5.3

Idle Mode

When the SM1..0 bits are written to 00, the SLEEP instruction makes the MCU enter Idle

mode, stopping the CPU but allowing the SPI, Analog Comparator, ADC, USI start condition,

Asynchronous Timer/Counter, Watchdog, and the interrupt system to continue operating. This

sleep mode basically halts clk

CPU and clkFLASH, while allowing the other clocks to run.

Idle mode enables the MCU to wake up from external triggered interrupts as well as internal

ones like the SPI interrupts. If wake-up from the Analog Comparator interrupt is not required,

the Analog Comparator can be powered down by setting the ACD bit in the Analog Compara-

tor Control and Status Register – ACSR. This will reduce power consumption in Idle mode. If

the ADC is enabled, a conversion starts automatically when this mode is entered.

5.4

ADC Noise Reduction Mode

When the SM1..0 bits are written to 01, the SLEEP instruction makes the MCU enter ADC

Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, the

USI start condition, the asynchronous Timer/Counter and the Watchdog to continue operating

(if enabled). This sleep mode basically halts clk

I/O, clkCPU, and clkFLASH, while allowing the

other clocks to run.

This improves the noise environment for the ADC, enabling higher resolution measurements.

If the ADC is enabled, a conversion starts automatically when this mode is entered. Apart from

the ADC Conversion Complete interrupt, only an External Reset, a Watchdog System Reset, a

Watchdog Interrupt, a Brown-out Reset, a USI start condition interrupt, an asynchronous

Timer/Counter interrupt, an SPM/EEPROM ready interrupt, an external level interrupt on INT0

or INT1 or a pin change interrupt can wake up the MCU from ADC Noise Reduction mode.

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