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PCIF0 Folha de dados(PDF) 283 Page - ATMEL Corporation |
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PCIF0 Folha de dados(HTML) 283 Page - ATMEL Corporation |
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283 / 294 page  283 9219A–RFID–01/11 Atmel ATA5505 [Preliminary] (0xD1) LINSEL – – – – /LAINC LINDX2 LINDX1 LINDX0 page 189 (0xD0) LINIDR LP1 LP0 LID5 / LDL1 LID4 / LDL0 LID3 LID2 LID1 LID0 page 189 (0xCF) LINDLR LTXDL3 LTXDL2 LTXDL1 LTXDL0 LRXDL3 LRXDL2 LRXDL1 LRXDL0 page 188 (0xCE) LINBRRH – – – – LDIV11 LDIV10 LDIV9 LDIV8 page 188 (0xCD) LINBRRL LDIV7 LDIV6 LDIV5 LDIV4 LDIV3 LDIV2 LDIV1 LDIV0 page 188 (0xCC) LINBTR LDISR – LBT5 LBT4 LBT3 LBT2 LBT1 LBT0 page 187 (0xCB) LINERR LABORT LTOERR LOVERR LFERR LSERR LPERR LCERR LBERR page 186 (0xCA) LINENIR – – – – LENERR LENIDOK LENTXOK LENRXOK page 186 (0xC9) LINSIR LIDST2 LIDST1 LIDST0 LBUSY LERR LIDOK LTXOK LRXOK page 185 (0xC8) LINCR LSWRES LIN13 LCONF1 LCONF0 LENA LCMD2 LCMD1 LCMD0 page 184 (0xC7) Reserved (0xC6) Reserved (0xC5) Reserved (0xC4) Reserved (0xC3) Reserved (0xC2) Reserved (0xC1) Reserved (0xC0) Reserved (0xBF) Reserved (0xBE) Reserved (0xBD) Reserved (0xBC) USIPP USIPOS page 164 (0xBB) USIBR USIB7 USIB6 USIB5 USIB4 USIB3 USIB2 USIB1 USIB0 page 160 (0xBA) USIDR USID7 USID6 USID5 USID4 USID3 USID2 USID1 USID0 page 159 (0xB9) USISR USISIF USIOIF USIPF USIDC USICNT3 USICNT2 USICNT1 USICNT0 page 160 (0xB8) USICR USISIE USIOIE USIWM1 USIWM0 USICS1 USICS0 USICLK USITC page 161 (0xB7) Reserved (0xB6) ASSR – EXCLK AS0 TCN0UB OCR0AUB – TCR0AUB TCR0BUB page 106 (0xB5) Reserved (0xB4) Reserved (0xB3) Reserved (0xB2) Reserved (0xB1) Reserved (0xB0) Reserved (0xAF) Reserved (0xAE) Reserved (0xAD) Reserved (0xAC) Reserved (0xAB) Reserved (0xAA) Reserved (0xA9) Reserved (0xA8) Reserved (0xA7) Reserved (0xA6) Reserved (0xA5) Reserved (0xA4) Reserved (0xA3) Reserved (0xA2) Reserved 26. Register Summary (Continued) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page Notes: 1. Address bits exceeding EEAMSB (Table 22-8 on page 239) are don’t care. 2. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 3. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. 4. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other Atmel® AVR®s, the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 5. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel AVR is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used |
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