PIC16F5X datasheet(15/88 Pages) MICROCHIP

15 / 88 page

DS41213D-page 13

PIC16F5X

3.0

MEMORY ORGANIZATION

PIC16F5X memory is organized into program memory

and data memory. For the PIC16F57 and PIC16F59,

which have more than 512 words of program memory,

a paging scheme is used. Program memory pages are

accessed using one or two STATUS register bits. For

the PIC16F57 and PIC16F59, which have a data mem-

ory register file of more than 32 registers, a banking

scheme is used. Data memory banks are accessed

using the File Selection Register (FSR).

3.1

Program Memory Organization

The PIC16F54 has a 9-bit Program Counter (PC)

capable of addressing a 512 x 12 program memory

space (Figure 3-1). The PIC16F57 and PIC16F59 have

an 11-bit Program Counter capable of addressing a 2K

x 12 program memory space (Figure 3-2). Accessing a

location above the physically implemented address will

cause a wraparound.

A NOP at the Reset vector location will cause a restart

at location 000h. The Reset vector for the PIC16F54 is

at 1FFh. The Reset vector for the PIC16F57 and

PIC16F59 is at 7FFh. See Section 3.5 “Program

Counter” for additional information using CALL and

GOTO

instructions.

FIGURE 3-1:

PIC16F54 PROGRAM

MEMORY MAP AND

STACK

FIGURE 3-2:

PIC16F57/PIC16F59

PROGRAM MEMORY MAP

AND STACK

PC<8:0>

Stack Level 1

Stack Level 2

CALL, RETLW

000h

1FFh

Reset Vector

0FFh

100h

On-chip

Program

Memory

PC<10:0>

Stack Level 1

Stack Level 2

000h

1FFh

Reset Vector

0FFh

100h

On-chip Program

Memory (Page 0)

On-chip Program

Memory (Page 1)

On-chip Program

Memory (Page 2)

On-chip Program

Memory (Page 3)

200h

3FFh

2FFh

300h

400h

5FFh

4FFh

500h

600h

7FFh

6FFh

700h

CALL, RETLW

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