PIC16F5X datasheet(31/88 Pages) MICROCHIP

31 / 88 page

DS41213D-page 29

PIC16F5X

6.0

I/O PORTS

As with any other register, the I/O registers can be writ-

ten and read under program control. However, read

instructions (e.g., MOVF PORTB, W) always read the I/O

pins independent of the pin’s Input/Output modes. On

Reset, all I/O ports are defined as input (inputs are at

high-impedance), since the I/O control registers

(TRISA, TRISB, TRISC, TRISD and TRISE) are all set.

6.1

PORTA

PORTA is a 4-bit I/O register. Only the low order 4 bits

are used (PORTA<3:0>). The high order 4 bits

(PORTA<7:4>) are unimplemented and read as ‘0’s.

6.2

PORTB

PORTB is an 8-bit I/O register (PORTB<7:0>).

6.3

PORTC

PORTC is an 8-bit I/O register (PORTC<7:0>) for the

PIC16F57 and PIC16F59.

PORTC is a General Purpose Register for the

PIC16F54.

6.4

PORTD

PORTD is an 8-bit I/O register (PORTD<7:0>) for the

PIC16F59.

PORTD is a General Purpose Register for the

PIC16F54 and PIC16F57.

6.5

PORTE

PORTE is an 4-bit I/O register for the PIC16F59. Only

the high order 4 bits are used (PORTE<7:4>). The low

order 4 bits (PORTE<3:0>) are unimplemented and

read as ‘0’s.

PORTE is a General Purpose Register for the

PIC16F54 and PIC16F57.

6.6

TRIS Registers

The output driver control registers are loaded with the

contents of the W register by executing the TRIS f

instruction. A ‘1’ from a TRIS register bit puts the corre-

sponding output driver in a High-Impedance (Input)

mode. A ‘0’ puts the contents of the output data latch

on the selected pins, enabling the output buffer.

The TRIS registers are “write-only” and are set (output

drivers disabled) upon Reset.

6.7

I/O Interfacing

The equivalent circuit for an I/O port pin is shown in

Figure 6-1. All ports may be used for both input and

output operation. For input operations, these ports are

non-latching. Any input must be present until read by

an input instruction (e.g., MOVF PORTB, W). The out-

puts are latched and remain unchanged until the output

latch is rewritten. To use a port pin as output, the

corresponding direction control bit (in TRISA, TRISB,

TRISC, TRISD and TRISE) must be cleared (= 0). For

use as an input, the corresponding TRIS bit must be

set. Any I/O pin can be programmed individually as

input or output.

FIGURE 6-1:

EQUIVALENT CIRCUIT

FOR A SINGLE I/O PIN

Note:

A read of the ports reads the pins, not the

output data latches. That is, if an output

driver on a pin is enabled and driven high,

but the external system is holding it low, a

read of the port will indicate that the pin is

low.

Data

Bus

Port

TRIS ‘f’

Data

TRIS

RD Port

VSS

VDD

I/O

Reg

Latch

Reset

VDD

VSS

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