SH7014 datasheet(18/754 Pages) RENESAS

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Rev.5.00 Sep. 27, 2007 Page xviii of xxxiv

REJ09B0398-0500

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Page

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18.5.4 RAM Emulation

503

Description amended

RAMER specifies the area of flash memory to be overlapped

with part of RAM when emulating real-time flash memory

programming. RAMER is initialized to H'0000 by a reset and in

hardware standby mode. It is not initialized in software standby

mode. RAMER settings should be made in user mode or user

program mode.

18.7.2 Program-Verify

Mode

Figure 18.13 Program/

Program-Verify

Flowchart

512

Figure amended and note 5 added

Set SWE-bit of FLMCR1

Wait 10

μs

n = 1

m = 0

Successively write 32-byte data in rewrite data

area in RAM to flash memory

Enable WDT

Set PSU bit in FLMCR1(2)

Wait 50

μs

Set PSU bit in FLMCR1(2)

Wait 200

μs

Write start

Set PSU bit in FLMCR1(2)

Wait 10

μs

Wait 10

μs

Wait

4 μs

Wait 2

μs

Store 32 bytes write data in write

data area and rewrite data area

Wait 4

μs

Set PSU bit in FLMCR1(2)

Disable WDT

Set PSU bit in FLMCR1(2)

Perform dummy-write of H'FF to verify address

Set PSU bit in FLMCR1(2)

Clear SWE bit of FLMCR1

m = 1

Write end

Write data = Verify data?

32 byte data

verify complete?

m = 0?

Increment address

Clear SWE bit of FLMCR1

≥ 1000?

← n + 1

Start

Transfer rewrite data to rewrite data area

Write end

Write failure

Read verify data

Operate rewrite data

Note:

5. Set the values of x, y, z,

α, β, γ, ε, η, and N to match

the characteristics of the memory device.

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