SH7014 datasheet(13/754 Pages) RENESAS

13 / 754 page

Rev.5.00 Sep. 27, 2007 Page xiii of xxxiv

REJ09B0398-0500

Item

Page

Revision (See Manual for Details)

Description amended and notes added

Bit 4

FER

Description

Receiving is in progress or has ended normally*

[Clearing conditions]

•

Power-on reset or standby mode

•

When 0 is written to FER after reading FER = 1

A receive framing error occurred*

[Setting condition]

When at the end of an SCI receive operation the final stop bit

of the receive data is checked and its value*

2 is 0

12.2.7 Serial Status

Bit 4—Framing Error

(FER):

318

Notes:

1. The FER flag is not affected and retains their previous

values when the RE bit in SCR is cleared to 0.

2. When the stop bit length is two bits, only the first bit is

checked to see if it is a 1. The second stop bit is not

checked. When a framing error occurs, the SCI transfers

the receive data into the RDR but does not set RDRF.

Serial receiving cannot continue while FER is set to 1. In

the clock synchronous mode, serial transmitting is also

disabled. In addition, serial transmission cannot continue

in clock synchronous mode.

Description amended and notes added

Bit 3—Parity Error

(PER):

Bit 3

PER

Description

Receiving is in progress or has ended normally*

[Clearing conditions]

•

Power-on reset or standby mode

•

When 0 is written to PER after reading PER = 1

A receive parity error occurred*

[Setting condition]

PER is set to 1 if the number of 1s in receive data, including

the parity bit, does not match the even or odd parity setting of

the parity mode bit (O/

E) in the serial mode register (SMR)

Notes:

1. The PER flag is not affected and retains their previous

values when the RE bit in SCR is cleared to 0.

2. When a parity error occurs, the SCI transfers the receive

data into the RDR but does not set RDRF. Serial receiving

cannot continue while PER is set to 1. In the clock

synchronous mode, serial transmitting is also disabled. In

addition, serial transmission cannot continue in clock

synchronous mode.

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