SH7014 datasheet(82/754 Pages) RENESAS

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2. CPU

Rev.5.00 Sep. 27, 2007 Page 48 of 716

REJ09B0398-0500

Reset State: The CPU resets in the reset state. When the

RES pin level goes low, a power-on reset

results.

Exception Processing State: The exception processing state is a transient state that occurs when

exception processing sources such as resets or interrupts alter the CPU's processing state flow.

For a reset, the initial values of the program counter (PC) (execution start address) and stack

pointer (SP) are fetched from the exception processing vector table and stored; the CPU then

branches to the execution start address and execution of the program begins.

For an interrupt, the stack pointer (SP) is accessed and the program counter (PC) and status

from the exception processing vector table; the CPU then branches to that address and the program

starts executing, thereby entering the program execution state.

Program Execution State: In the program execution state, the CPU sequentially executes the

program.

Power-Down State: In the power-down state, the CPU operation halts and power consumption

declines. The SLEEP instruction places the CPU in the power-down state. This state has two

modes: sleep mode and standby mode.

2.5.2

Power-Down State

Besides the ordinary program execution states, the CPU also has a power-down state in which

CPU operation halts, lowering power consumption. There are two power-down state modes: sleep

mode and standby mode.

Sleep Mode: When standby bit SBY (in the standby control register SBYCR) is cleared to 0 and a

SLEEP instruction executed, the CPU moves from program execution state to sleep mode. In the

sleep mode, the CPU halts and the contents of its internal registers and the data in on-chip cache

(or on-chip RAM) is maintained. The on-chip peripheral modules other than the CPU do not halt

in the sleep mode.

To return from sleep mode, use a power-on reset, any interrupt, or a DMA address error; the CPU

returns to the ordinary program execution state through the exception processing state.

Standby Mode: To enter the standby mode, set the standby bit SBY (in the standby control

peripheral module, and oscillator functions are halted. However, when entering standby mode, the

DMA master enable bit of the DMAC should be set to 0. If multiplication-related instructions are

being executed at the time of entry into standby mode, the values of MACH and MACL will

become undefined.

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