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SH7014 Folha de dados(PDF) 41 Page - Renesas Technology Corp |
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SH7014 Folha de dados(HTML) 41 Page - Renesas Technology Corp |
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41 / 754 page ![]() 1. SH7014/16/17 Overview Rev.5.00 Sep. 27, 2007 Page 7 of 716 REJ09B0398-0500 PC15/A15 PC14/A14 PC13/A13 PC12/A12 PC11/A11 PC10/A10 PC9/A9 PC8/A8 PC7/A7 PC6/A6 PC5/A5 PC4/A4 PC3/A3 PC2/A2 PC1/A1 PC0/A0 PD15/D15 PD14/D14 PD13/D13 PD12/D12 PD11/D11 PD10/D10 PD9/D9 PD8/D8 PD7/D7 PD6/D6 PD5/D5 PD4/D4 PD3/D3 PD2/D2 PD1/D1 PD0/D0 : Peripheral address bus : Peripheral data bus : Internal address bus : Internal upper data bus : Internal lower data bus RES WDTOVF MD3 MD2 MD1 MD0 NMI EXTAL XTAL PLLVcc PLLCAP PLLVss Vcc/FWP* Vcc Vcc Vcc Vcc Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss AVcc AVss Serial communi- cation interface ( ×2 channels) Multifunction timer/ pulse unit Interrupt controller Bus state controller Compare match timer ( ×2 channels) A/D converter Watch- dog timer CPU Direct memory access controller Flash ROM (128 kB)/ mask ROM (64 kB) RAM (4 kB/3 kB)/ cache (1 kB) PLL Note: * V CC in the SH7016, FWP in the SH7017 (except FWE pin in the programmer mode). Figure 1.2 Block Diagram of the SH7016, SH7017 |
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