HD64F2149YV datasheet(780/1075 Pages) RENESAS

780 / 1075 page

Section 24 Power-Down State

Rev. 3.00 Jan 18, 2006 page 752 of 1044

REJ09B0280-0300

Bit 7

SSBY

Description

Transition to sleep mode after execution of SLEEP instruction in high-speed mode or

medium-speed mode

(Initial value)

Transition to subsleep mode after execution of SLEEP instruction in subactive mode

Transition to software standby mode, subactive mode, or watch mode after execution

of SLEEP instruction in high-speed mode or medium-speed mode

Transition to watch mode or high-speed mode after execution of SLEEP instruction in

subactive mode

Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU

waits for the clock to stabilize when software standby mode, watch mode, or subactive mode is

cleared and a transition is made to high-speed mode or medium-speed mode by means of a

specific interrupt or instruction. With crystal oscillation, refer to table 24.4 and make a selection

according to the operating frequency so that the standby time is at least 8 ms (the oscillation

settling time). With an external clock, any selection can be made.

Bit 6

Bit 5

Bit 4

STS2

STS1

STS0

Description

Standby time = 8192 states

(Initial value)

Standby time = 16384 states

Standby time = 32768 states

Standby time = 65536 states

Standby time = 131072 states

Standby time = 262144 states

Reserved

Standby time = 16 states*

Note:

This setting must not be used in the flash memory version.

Bit 3—Reserved: This bit cannot be modified and is always read as 0.

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