HD64F2149YV datasheet(745/1075 Pages) RENESAS

745 / 1075 page

Section 22 ROM

Rev. 3.00 Jan 18, 2006 page 717 of 1044

REJ09B0280-0300

22.8.2

Software Protection

Software protection can be implemented by setting the SWE bit in FLMCR1 and erase block

registers 1 and 2 (EBR1, EBR2). When software protection is in effect, setting the P or E bit in

flash memory control register 1 (FLMCR1) does not cause a transition to program mode or erase

mode. (See table 22.10.)

Table 22.10 Software Protection

Functions

Item

Description

Program

Erase

SWE bit protection

• Clearing the SWE bit to 0 in FLMCR1 sets

the program/erase-protected state for all

blocks.

(Execute in on-chip RAM or external

memory.)

Yes

Block specification

protection

• Erase protection can be set for individual

blocks by settings in erase block registers

1 and 2 (EBR1, EBR2).

• Setting EBR1 and EBR2 to H'00 places all

blocks in the erase-protected state.

—

Yes

22.8.3

Error Protection

In error protection, an error is detected when MCU runaway occurs during flash memory

programming/erasing, or operation is not performed in accordance with the program/erase

algorithm, and the program/erase operation is aborted. Aborting the program/erase operation

prevents damage to the flash memory due to overprogramming or overerasing.

If the MCU malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in

FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1, and EBR2

settings are retained, but program mode or erase mode is aborted at the point at which the error

occurred. Program mode or erase mode cannot be re-entered by re-setting the P or E bit. However,

PV and EV bit setting is enabled, and a transition can be made to verify mode.

FLER bit setting conditions are as follows:

• When flash memory is read during programming/erasing (including a vector read or instruction

fetch)

• Immediately after exception handling (excluding a reset) during programming/erasing

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