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HD64F2149YV Folha de dados(PDF) 744 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
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Section 22 ROM
Rev. 3.00 Jan 18, 2006 page 716 of 1044
REJ09B0280-0300
22.8
Flash Memory Protection
There are three kinds of flash memory program/erase protection: hardware protection, software
protection, and error protection.
22.8.1
Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Hardware protection is reset by settings in flash memory control registers 1
and 2 (FLMCR1, FLMCR2) and erase block registers 1 and 2 (EBR1, EBR2). (See table 22.9.)
Table 22.9
Hardware Protection
Functions
Item
Description
Program
Erase
Reset/standby
protection
• In a reset (including a WDT overflow
reset) and in hardware standby mode,
software standby mode, subactive mode,
subsleep mode, and watch mode,
FLMCR1, FLMCR2, EBR1, and EBR2 are
initialized, and the program/erase-
protected state is entered.
• In a reset via the RES pin, the reset state
is not entered unless the
RES pin is held
low until oscillation stabilizes after
powering on. In the case of a reset during
operation, hold the
RES pin low for the
RES pulse width specified in the AC
Characteristics section.
Yes
Yes



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